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Original question:

LM5170-Q1: Number of phase limitation and how the interleaving currents are balanced?

LM5170-Q1: OPT="1" means SNYCOUT=90 deg and CLK2=180 deg , "0" means 120 deg, and CLK2=240 deg?

NY
Expert 3040 points
Part Number: LM5170-Q1

Hi,

I would like to confirm the Oscillator and phase splitter in block diagram, once device received SYNCIN which seems to use CLK1, splitter generates SYNCOUT and CLK2. 

If OPT is set to high, SYNCOUT will be 90 deg shift and CLK2 will be 180 deg shift respectively? 

Based on this theory, I am thinking following tables, but please clarify if my understand is correct. what's the Channel vs Phase Angle relationship table for Figure 43? because only Figure 40 and 41 have the table in datasheet.

Channel and Phase Angle relation in the case of Figure 43. 

Channel Phase Angle
U1-CH1 0 deg
U1-CH2 180 deg
U2-CH1

90 deg
U2-CH2 270 deg
U4-CH1 180 deg
U4-CH2 360 deg
U3-CH1 270 deg
U3-CH2 450 deg

regards, ny

  • 0
    TI__Guru* 78240 points
    Hi Yada-san,

    The answer to your first question is yes. This should be clearly described in the datasheet.

    Regarding Figure 43, your table is correct. Since these are clock signals, 360deg=0deg, and 450deg=90deg. The eight channels are split into four pairs, and these four pairs (two channels) are paced at 0deg, 90deg, 180deg, and 270deg, namely 90deg interleaving operation.

    Let us know if we can be of further assistance.

    Thanks,
    Youhao
  • 0 in reply to Youhao Xi
    TI__Expert 3040 points
    Hi Youhao, Thanks clarification! regards ny