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TPS3823: DO you know what meaning " RESET is stuck at a logic low......"?

Part Number: TPS3823
Other Parts Discussed in Thread: TPS3820, , TPS3828, TPS3824

Hi team,

from the dataseet, customers sea below "

In applications where the input to the WDI pin is active (transitioning high and low) and the TPS3820, TPS3823,
TPS3824, or TPS3828 is asserting RESET, RESET is stuck at a logic low after the input voltage returns above
VIT–.

"

DO you know what meaning is?

 

  • Hi Eggsy,

    The meaning is when RESET occurs and goes logic low, if WDI signal arrives on WDI pin, RESET stays low even if VDD rises above threshold. The RESET output latches and remains low. If you do not want this latching type, then please use version A or use the external transistor such as MOSFET to keep WDI signal from arriving on WDI pin when RESET is active and logic low.

    Please let me know if this is clear or if you have more questions. Thanks!

    -Michael
  • Hi Michael,

    You said " if WDI signal arrives on WDI pin, RESET stays low". May I know what WDI signal is like? Square wave? or just logic high? or just logic low?
  • Hi Eggsy,

     

    To answer your question, the WDI signal is a pulsing signal with the rising or falling edge arriving within the watchdog timeout. If the WDI is pulsing while /RESET is active and logic low, the /RESET will latch even if VDD rises above the under voltage threshold. You can choose the A version if you do not want latching behavior or you can use a decoupling MOSFET as the datasheet mentions.

     

    Please let me know if you have any more questions or if this is unclear. Thanks!

     

    -Michael

  • Hi Michael,

    Thanks! If the /RESET latch, how to make the RESET come back to high logic ?
  • Eggsy,

    You have to restart the device. This would be best for safety applications that require the user to investigate the issue before allowing the device to operate again. If you do not want the latch version, please user device version A

    -Michael