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Original question:

TPS6590377 REGEN1 signal

TPS659037: TPS6590377 REGEN1 signal

Lin_Charles
Expert 4260 points
Part Number: TPS659037
Other Parts Discussed in Thread: TPS22965, AM5726

Hi all. It is nice to find you all here. My customer is using TPS6590377 to power AM5726 with REGEN1 signal to control TPS22965 to get 3V3 from external DCDC. Now the processor cannot be started, if they without using REGEN1 signal, it can start normally. We suspect that the power sequence of 3V3 or the rise time of 3V3 may cause this problem, my questions are

  • What is the min or max time required to get the LDOUSB 3V3 power? Now the time is 305us (figure1) verse 500 us in the figure2
  • Will the rise time of 3V3 cause this problem?
  • What other reasons may cause this problem? Change resistor or capacitor in figure 4 may solve this problem？
  • Figure1. Yellow is the SMPS9, pink is the REGEN1 signal
  • Figure 2 Power sequence
  • Figure 4 external control circuit

  • 0
    TI__Genius 10000 points

    Hi,

    Can you clarify - is the yellow signal in Figure 1 SMPS9 or LDOUSB?

    Also, can you include the following signals in a scope shot - SMPS9, REGEN1, output of TPS22965, and LDOUSB?

    It is possible that there could be some power sequence issue due to the slew rates. The requested scope shot should help us understand. There is not a minimum or maximum timing requirement between the rails. It is just required that the rails be powered in order and that the previous rail has reached its value before the next rail begins to turn on.

    Thanks,

    Nastasha

  • 0 in reply to Nastasha
    TI__Expert 4260 points
    Sorry about my mistake, the yellow signal is the output of TPS22965, and it is also the 3V3 rail waveform. My question is what the time requirement of 3V3 rail after the previous rail has reached its value and before the next rail begins to turn on?
  • 0 in reply to Lin_Charles
    TI__Genius 10000 points

    The requirement is that each rail reaches is programmed voltage before the next rail becomes high. There is not a specific time requirement. The timing requirement would be system dependent, based on the capacitance loading on each rail.

    Thanks,

    Nastasha