• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 449 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCD3138A: max UART Baud Rate Question

AndreTseng
Intellectual 2575 points
Part Number: UCD3138A
Other Parts Discussed in Thread: UCD3138,

What is max baud rate with 2% OSC(250Mhz) draft?  

  • 0
    TI__Genius 17090 points
    Andre, I'm not sure what you mean by draft. If it means step size of baud rate resolution, all the UCD3138 family members with the A revision have 3 more bits in the Baud rate divider than the non-A. This means that they divide down the 15.625 MHz ICLK. So the baud rate step size goes to 2% at 312.5 kHz nominal.
  • 0 in reply to Ian Bower
    TI__Intellectual 2575 points
    If 250MHz has +2% or -2% of error, that means typical 15.625MHz ICLK will change to 15.9375MHz or 15.3125MHz. In this condition, if another site has no clock dracft, and transition path is ideally no propergration distortion, what is the max baud rate ucd3138a can achieve without TX/RX error?
  • 0 in reply to AndreTseng
    TI__Genius 17090 points

    Andre, I did a spot check at a setting of 3 in UARTLBAUD for both of the UARTs of a UCD3138A.  I could change the UARTSBAUD on the transmit side to 1 and 2, which gave slowdowns of the transmit on the scope to about 3.1 and 6.1%, and it would still work.  I could also change UARTLBAUD to 2, and UARTSBAUD to 7, which gave a transmit speedup of about 3.1%.  This worked, but changing UARTSBAUD to 6 for a speed up of 6.3% did not. 

    So it seems like it works over a fairly large range at up to pretty high speeds.  So I wouldn't think it's too much of a worry.

    However, I would strongly suggest that the designer of any system test very carefully on the final system.  At speeds like that, there will probably be non-perfect timing on both the transmitter and receiver of both devices, because the speed of the clock is getting closer to the speed of the bits. 

    This test was also done with 2 stop bits, since the UCD3138A versions all put in a minimum of 2 stop bits on transmit. 

    I didn't enable the RX_CENTER_SAMPLE special modes, just left it at the default.  I also didn't enable RX_SYNC_ON_START_EN. 

    I should mention that the baud rate for the test is about 490 KHz.