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CSD95490Q5MC: Improve thermal by layout

user1874945
Intellectual 300 points
Part Number: CSD95490Q5MC

Hi TI expert,

We are using CSD95490Q5MC on our current project. It is in layout stage. We want to optimize the PCB layout to optimize thermal dissipation through PCB.

Here is what we have done.

1. Use 15 vias to connect the center GND thermal pad to internal layers.

2. Have 8 layers 0.5oz solid ground planes to better spread heat across to other layers.

Per 2018 TI power seminar https://training.ti.com/common-mistakes-3?cu=1135482, TI expert advised to open solder mask of the vias  and make the heat radiate through PCB to another layout.

May I ask the more specific about the detail? Is there a good practice? 

Thanks,

Dora

  • 0
    TI__Intellectual 800 points

    Hi Dora,

    For CSD95490Q5MC, please use the stencil recommended by TI available on data-sheet .

    The via heads are covered by solder resist both on TOP/Bottom layers to prevent solder and flux during reflow to wick down the via hole.  Solder mask has openings only in regions you want the CSD95490 PGND paddle to be soldered to PCB. This type of stencil design provides the best trade-off between thermal performances and manufacturing solderability and reflow. As the training course suggests, heat is being transferred to internal copper layers through via conduction while Top/Bottom layers help dissipate heat through radiation.

    Best regards.