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LM5035:Unbalanced pvm

Andrey Kitov
Prodigy 80 points
Part Number: LM5035

I'm testing LM5035:


1. feedback loop disabled
2. A precision current source is connected to the COMP terminal.
3. I change the current at the input and monitor the change in PWM on transistors

Observations: there are current values at which the PWM on the upper transistor is 70%, and on the lower transistor only 3%.

It was expected that the chip should change evenly the duty cycle on both channels, taking into account the delays.

My circuit is not typical for this chip. Load 24 V, 30 mA (2 channels).
Transformer 4: 6: 6.
This decision was made to reduce the number of turns  of the transformer windings

Thanks!

  • 0
    TI__Expert 3095 points

    Hi Andrey Kitov,

    The PWM signal internally is generated by comparing the internal COMP level with the voltage on the RAMP pin. Alternate PWM pulses are routed to the upper and lower driver. This should result in matched duty cycle.

    Please capture the COMP current, the RAMP pin voltage and the upper and lower driver outputs so that we can check all is as it should be.

    What are you doing with the CS pin? It is also possible that a signal on this pin is causing the pulse width to be cut short.

    Thanks

    Joe Leisten