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TPS24740: Swicthes

Part Number: TPS24740

     Our customer  has some problem about the stability of the current monitor of the TPS24740 chip,

  1. why should the voltage be set to 10mv to 67.5mV?  what is the cause of instability?
  2. why should RSTBL be larger than RIMONxRSET/(10xRSET-RIMON)?

Is there a formula to analyze the stability of the current monitor?

  • Hi Min,

    Thanks for reaching out!
    Can you share description of the problem and test waveforms along with test conditions.
    10mv to 67.5mV is the sense voltage range where the internal servo amplifier has control on the FET GATE regulation. Beyond that range, external resistor is needed to scale the voltage within the range.

    Best Regards,
    Rakesh
  • Thank you for replying me!
    But I still have some doubt about it,
    The main problem is :
    1.how can I get the value (10mV and 67.5mV), may be there is a formula to deduce it?
    2.What is the cause of instability and why the extra resistance RSTBL can eliminate it?
  • Hi Min,

    1.how can I get the value (10mV and 67.5mV), may be there is a formula to deduce it?
    A) These are IC design inputs.
    2.What is the cause of instability and why the extra resistance RSTBL can eliminate it?
    A) Instability could lead to lost of regulation on GATE control and the cause may range from slight degradation in power limit accuracy to the extent of external FET damage and all this depends on the circuit operating conditions.

    Best Regards,
    Rakesh
  • Hi Rakash,
    Thank you for replying. However, I still have some doubt on the chip.
    About question 1, if I choose a VSNS,CL <10mV, what will happen,will the internal loop break down?
  • Hi Min,

    It increases error of power limit/current limit.



    Best Regards,
    Rakesh