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WEBENCH® Tools/LM5088: lm5088_2 poor heat dissipation

Part Number: LM5088
Other Parts Discussed in Thread: CSD19534Q5A

Tool/software: WEBENCH® Design Tools

hi,

1.  SW  waveform (the flowing picture) is not regular periodic square waves, it include 65ns  spikes, is it work ok?

2. my design :18V~72V input;  12Vout 3A; fsw=400Khz, L=33uH, Rs=20mohm, the IC is not working until  input above 30V, is it  LDO so hot  when input above 30V? please give me the right answer, and how to solve. by the way, the VCC  external power supply by  output, and also  the  zenner  connected between VCC and GND.

LM5088_sw.doc

  • hi,
    increase load (0A-1A),the output drop down 0.6V(12.3V down to 11.6V), please tell me how to solove???
  • hi,
    VIN=60V, Iload=1.1A, output down off, Iload=1A VOUT=11.76v;Iload=0A VOUT=12.23v ; please help me . my design:VIN=18~72v, VOUT=12v, Iout=3A;
  • User,

    1. No, that is not normal. It may work okay but this sounds to me like we have an issue to fix.

    2. This is also not normal.

    Please share the schematic and layout. I'll take a look and get back to you.

    -Sam
  • hi sam,

    please check my schematic and layout.

    sch_pcb.rar

  • hi sam,

    1.  1 pcs IC  broken down already, please help me .

    2.  I give you my design parameter: Css=22nf(soft start),Rt=14.6K( set frequency 400Khz), Rramp=196K, Cres_dith=10uF, CVcc=1uF, Ccomp=1.5nF, Rcomp=92K, Chf=22pf, Rcs=20mohm, Cboot=27nf,  M1=CSD19534Q5A, D2=MBRD10200CT, L2=33uH(power  inductance), Cout=330uf+3*10uf, Cin=22uf+3*4.7uf,  D1=B220A-13-F(output voltage 12V  supply to VCC)

  • User,

    Thank you for giving me your Altium file. I usually get a PDF or images but this is a much better way to analyze a board. Thank you!

    Schematic recommendations:

    • Increasing CBOOT from 27nF to 100nF. This can affect your FET's ability to turn on.
    • Increase CVCC from 680nF to 1uF. This will ensure the internal circuitry has a stable voltage.
    • Connect the snubber to GND after the current sense resistor. This may be causing false trips.

    Layout recommendations:

    • Consider return paths and loops. Try to make high di/dt loops as small as possible. For example think about where the transient current goes when you turn the high-side FET on. The current goes from CIN+ through the FET through the Inductor (parasitic capacitance) through the ceramic COUT+ to COUT- to CIN-. That loop has to be small and unobstructed. Look at CIN-. Those caps are on the back-side connected to the GND plane but there are no vias connecting to any other layers. That current has to travel on the bottom layer around all those vias to COUT-. This and similar issues should be fixed.
    • Check the datasheet and EVM for layout guidelines.

    -Sam

  • hi Sam,
    thank you for your reply.
    I changed bottom paste the snubber circuit RC(R=5.1ohm,c=1000pf )and RS(sense resistance) to top layer, and together with schottky D2---SW waveform is better than before.

    1. but above 3A load @18V,SW not normal again.
    2. and also above 30V input , the ambient temperature is 25 degrees, the PCB , IC, schottky are so hot, the temperature reached 73℃, 70℃,71℃, and efficency is 88%( 1.8A@30V ), and 60V @1.1A over temperature protection. and I checked the SW normal.

    please help me how to improve the temperature. my application ambient temperature is 55 degree. now 25 degrees also unnomal.
  • hi Sam,
    by the way, vout=12v supply voltage can be applied to the VCC pin, so Rramp should be changed to 314K, according to Ios=VOUT*25uA, Rramp=(Vout-Vramp)/(Ios-25), here Vramp is 1V, -----is this right?
    best regards
  • User,

    So now R3, C16, and R11 are on the top layer but did you connect the snubber to GND or to R11? It should be connected to GND, not R11.

    1. Not normal how? Does it look the same way it looked before or is it not normal in a different way?

    2. That efficiency seems okay. The heat is probably due to layout. The IC thermal pad should be connected to a large GND plane. Your layout has it connected to a small SGND plane. This should be as large as possible.

    Other layout guidelines:

    • Connect SGND and PGND closer to the IC. See the EVM and datasheet for guidelines.
    • Do not have a long thin trace go PGND (GND on your Altium file and GND in the datasheet).
    • And more. This layout will probably need to be redone. See EVM and datasheet for guidelines.

    Ios = VOUT * 5uA, not *25uA but yes, you calculated correctly.

    -Sam

  • hi sam,
    R3, C16 connect the snubber to R11 now----just copy the EVM datasheet, I think you are right,this should be connected to GND.
    ok , I will have a try to connect to GND.
  • User,

    I'm checking with the person who made the EVM to see if there was a reason for this. I'll let you know what they say.

    Keep me posted on your tests.

    -Sam
  • hi sam,
    So now R3, C16, and R11 are on the top layer , connect the snubber to GND ---the sw waveform the same as the before.
    1. LM5088 datasheet page 14 : Feature Description : For duty cycles greater than 50%, peak current mode control circuits are subject to sub-harmonic oscillation----is this the reason for SW waveform unnormal by my test
  • hi sam,
    1. according the datasheet of LM5088 , if the sw waveform is normally characterized by my test, so how to adding a fixed slop voltage ramp , the recommend parameter is what?Cramp? Rramp? Ccomp? Chf? Rcomp?
    2. the vout VPP up to 300mv ---so high, I just want to change the SW working on DCM to CCM ,so maybe can reduce theVPP.
  • User,

    1. Those values can be calculated from the equations/examples in the datasheet.

    2. This high vout VPP is probably due to the instability.

    Your heat issue is probably caused by your instability/improper regulation. And your improper regulation is probably due to your layout. I think you will need a new layout to fix these issues.

    There are lots of improvements that can be made on the layout. I'll list some of the big ones but you will need to use the EVM and datasheet to give you guidelines on fixing the entire layout.

    • Do not separate PGND and SGND as you've done. See the datasheet for the best way to do this.
    • Do not use a long thin trace to connect the GND pin to the GND of the board. All the current has to go through this trace which is not good because that long thin trace will have lots of inductance. This will be a bad GND.
    • Make sure high-current traces have clear paths, including the GND return paths.
    • Reduce inductance in the traces of high di/dt nodes.
    • And more. See the datasheet and EVM.

    -Sam

  • dear Sam,

    I have layouted again, please help me check out,   use the EVM and datasheet  to layout.SECOND_TEST0825_3.zip

  • User,

    Thanks for sending the PCB layout. The snubber resistor canbe reduced in size (0805 is sufficient). Generally, the larger component in the RC snubber is connected to GND so that the smaller component (typically the cap) is tied to SW. This reduces the radiated EMI effect. The smaller the SW node copper area, the better.

    Also, can you fill out the LM5088 quickstart file - this is available by download in the LM5088 product folder.

    Regards,
    Tim
  • HI Tim,
    The latest layout test not better than before, but SW waveform look like better than before, sub-oscillation is better. BUT now I just test 1minutes , the inductance so hot(above 100 temperature), the schottky (MBR10200CT) is broken down(not work) ,please help me, this is the second layout.
  • HI Tim,
    I just copy the EVM(AN-1913), why work worse the before, and the schottky (MBR10200CT) is broken down(not work), the snubber resistor canbe always copy the EVM, please help as soon as possible
  • Usre,

    Please send the completed quickstart file for review. Have you calculated the expected component power dissipations?

    Regards,
    Tim
  • Hi Tim,

    1.  I'm confused why the first layout load 2A( VIN=60V)without any component damaged  and the SW waveform is not regular square waves,  but the second layout( copy EVM layout) schottky damaged, the SW waveform looks like ok.

    2.  the  schottky (MBR10200CT): VF=0.9V,  IOUT=2A, duty=12/60=0.2, IF=Iav=(1-duty)*Iout=1.6A, P=VF*IF=0.9*1.6=1.44w.

    3. quickstart file: L=25.6uH ---choose 33uH,   RT=14.61k--choose 14.6K, Cramp=564pf--choose 1.5nf(is good for VPP),  Rramp=194K--choose 200k, Cout=196uf---choose 330uf+10uf+10+10uf+0.1uf(is better for VPP),  Cin=4.1uf ----choose 4.7uf*5, Rcomp=182.4K--choose 62.2K(better for VPP), Ccomp=218pf----choose 1.5nf, CHF=47pf---choose 22pf. CVCC=0.6uf---choose 1uf, Cres=11.667uf-----choose 10uf( the EVM here is 22nf, but I use this 22nf not work when any load startup, so I change this value to 10uF).

    4. the  RC absorbing circuit  5.1ohm ( footprint 2512), you recommend 0805,  VIN=60V, does the 0805 footprint  power  consumption meet ? and  here how  the RC power consumption ?

    best regards

    M5088_Quick_Start__MEfortim.xls