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Original question:

BQ77905: OCD2 DSG output Sometimes gets oscillated before it gets locked

BQ77905: OCD2 DSG output gets oscillated before it gets locked

john xiao
Intellectual 470 points
Part Number: BQ77905

Dear All:

 BQ77905 13S Application,I have add a diode(D1,D2,D3)in the VDD,the 13S SCH is

 

Do OCD2 test is abnormal.the DSG output gets oscillated  before it gets locked.

the PACK+(CH1),DSG(CH2) waveform is

the VDD(CH1), DSG(CH2)Waveform is

the VC5(CH1),DSG(CH2) waveform is

Why 13S Application OCD2 test DSG output Sometimes gets oscillated before it gets locked,please help explain the reason and give suggestions for improvement. Thank you.

  • 0
    TI__Guru 54715 points
    Hi John,
    If it is unique to the 13S configuration the effect is likely due to the stacking interface. The diode in the VDD feed will hold up the VDD voltage while the CHG and DSG voltage of the above part will fall with the cell on the other side of the diode.
    The diode is not part of the recommended application circuit. It will give risk of entering test mode, it will affect the effective threshold for CTRLC & CTRLD, and the desired effect is to hold up VDD so the FET drives drop less. It is not immediately clear which is happening, in the last picture VC5 is dropping to near 0V much like a short circuit but for a long period of time. At 10 ms off 20 ms on the time seems too short for customer test mode, it may be more like the 7 ms typical CTRx filter time acted on by the changing voltage.
    Is the load apparent on PACK- (to the LD pin) when DSG turns off?

    Possible improvement:
    Remove the diodes.
    Select the sense resistor or thresholds so that a short circuit looks like a short circuit rather than OCD2
    Size the cells to handle the OCD load without voltage collapse
    Filter the CTRx pins, but this will cause increased delays and may cause other issues.