LM5069: in-rush issue

Tommy Tzeng

Part Number: LM5069

Dear Sir,

i have a question,please refer the schematic and waveform below. we used LM5069MMX-2 on the IPC power source side.

why the inrush current in the 8A dose not turn-on the MOSFET, instead,the inrush current turn-on MOSFET at 11A..why , i setting the OCP point range to 9.7A~12.3A.

can you help to see the values of discrete components have set errors?

over 7 years ago

0 Rakesh over 7 years ago

TI__Guru** 105361 points

Hi Tommy Tzeng,

Can you please send me filled up design calculator. It is available at www.ti.com/.../toolssoftware. Include all the capacitance at the output.
We may need to consider dv/dt start-up circuit at GATE if required. The configuration is shown in the front page of the datasheet.

Best Regards,
Rakesh

0 Tommy Tzeng over 7 years ago in reply to Rakesh

Genius 5770 points

Dear Rakesh,

thanks for your reply, my output capacitor is only C499(100nF) and C494(10uF), so my in-rush current issue need to add a dv/dt start-up circuit ? can i know if my issue is related to the dv/dt start-up circuit?

power limit can be calculated by this formula,but can be measured waveform signale? i mean, is there a way measure the power limit correlation waveforms?

0 Rakesh over 7 years ago in reply to Tommy Tzeng

TI__Guru** 105361 points

Hi Tommy Tzeng,

Are you testing as standalone module ? Is the output going to some other module?
we can use math functions in the scope to check the power across FET= (Vin-Vout)*Iin
Please check by disabling UVLO function.

Best Regards,
Rakesh

0 Rakesh over 7 years ago in reply to Rakesh

TI__Guru** 105361 points

Hi Tommy Tzeng,

How is the behavior when UVLO function is disabled?

Best Regards,
Rakesh

0 Tommy Tzeng over 7 years ago in reply to Rakesh

Genius 5770 points

Hi Rakesh,

still in the test, reply the result later.

0 Tommy Tzeng over 7 years ago in reply to Rakesh

Genius 5770 points

Hi Rakesh,

Then condition (20Vin, 20V* (6/(20+6)) = 4.6V) doen't meet UVLO condition and UVLO doesn't work at that time.

so do you have any idea or comment

Regards,

Tommy

0 Rakesh over 7 years ago in reply to Tommy Tzeng

TI__Guru** 105361 points

Hi Tommy Tzeng,

Correct. It is not due to UVLO threshold. Can you share me layout file to check whether improper kelvin sensing lead to circuit breaker trip during startup.
Please refer Figure 11 and associated text in the app note www.ti.com/.../slva703.pdf to understand the reason for the false trip.

Best Regards,
Rakesh

0 Rakesh over 7 years ago in reply to Rakesh

TI__Guru** 105361 points

Hi Tommy Tzeng,

Please check at no-load and confirm the behavior. Thanks!

Best Regards,
Rakesh

0 Tommy Tzeng over 7 years ago in reply to Rakesh

Genius 5770 points

Hi Rakesh,

i will, attachment is layout file.

protego_pwr.zip

0 Rakesh over 7 years ago in reply to Tommy Tzeng

TI__Guru** 105361 points

Hi Tommy Tzeng,

Layout looks fine.
Can you please confirm the behavior at no-load.

Best Regards,
Rakesh

0 Rakesh over 6 years ago in reply to Rakesh

TI__Guru** 105361 points

Hi Tommy Tzeng,
In most of the cases, the start up failure happens due to heavy inrush current due to connected load or input capacitance of the connected load and not necessarily due to o/p cap of hot-swap. Please add dv/dt start-up circuit at GATE as per typical application diagram in the front page of the datasheet and check.

Best Regards,
Rakesh

0 Tommy Tzeng over 6 years ago in reply to Rakesh

Genius 5770 points

Hi Rakesh,

you are right~we have added the dv/dt start-up circuit and it is already OK, thanks for your great support.

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LM5069: in-rush issue