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UCC27714: Power design works using 27712 EVMs but not with 27714

Randhir Kalsi
Expert 4545 points
Part Number: UCC27714
Other Parts Discussed in Thread: UCC27712, , , UCC27712EVM-287, UCC27212

Hello team,

Hope you are doing well. Please see below question from the customer:

I prototyped using the UC27714. For proof of concept, I used 2 of the UCC27712 evm boards and stacked them in this same configuration and got sine wave at the outputs which are the switch nodes of the evm boards (On my prototype board, they are TP1 and TP2). I noticed that the evm board has 4 bulk capacitors on the HV rail and my board does not have any cap on the HV rail. My bench power supply is pretty hefty one and I am sure it has lots of bulk capacitance at the output. Some of the E2E forum discussed about switching too fast could prevent the boot capacitor not to have time for charging. But, that does not seem to be the case here, because it works with he evm boards. Please advise

Input = 400V DC @ 2A

Output = As high as possible 500 - 600W (Goal is to output DC Sine wave 20 kHz)

  • 0
    TI__Mastermind 23215 points
    Hello Randhir,
    Thank you for the interest in TI 620V half bridge drivers. I am an applications engineer supporting these device and will work to help with your concerns.
    First, I want to confirm that with your prototype using the UCC27714, that you are having issues with the operation, where when you use the UCC27712 EVM boards the operation of the inverter is as expected.
    Although the lab supply may have high current capability and large capacitance, the cables from the lab supply to the prototype board input will have significant parasitic inductance. Any time there is high dI/dt switching the parasitic inductance in the power train switching current loop will result in voltage spikes and ringing.
    This high voltage ringing can likely generate ground reference ringing on the control ground and appear on the gate driver input signals. Excessive ringing on the gate driver inputs will result in erratic operation, from the ringing. There needs to be local capacitance close to the half bridge power devices to minimize the switching current loop and reduce the voltage spikes or ringing.
    I would suggest adding capacitance close to the half-bridge power devices to see if this helps with the operation.
    If you want to provide scope plots of the HV supply, and the two switch nodes of the half bridges, I can review and comment on what may be the issue.
  • 0 in reply to Richard Herring
    Intellectual 320 points

    Hi Richard,

    I am evaluating the gate driver UCC27714 to build a sine wave generator of 20 KHz. The UCC27714EVM-551 is configured to convert 370-410 Vdc to 12 Vdc 50A. So, this does not work for what I want to do. However, I would like to use this EVM board to prove the circuit concept by modifying the board. Before I mess with it, can you explain to me a couple of things. 1) What is the purpose of the zener diode and transistor contraption to provide regulated 5V to Vcc1, Vcc2 for ISO7240MDW? is it more efficient than an LDO? 2) Looks like the board is switching 2 FETs on at a time at the rate of 100 KHz. The transformer T2 looks like a step up transformer. How does it step down from 400 Vdc to 12 Vdc?

    Bobby.

  • 0 in reply to Bobby Lam95
    TI__Guru**** 189401 points
    Hi Bobby,

    It will be a few days (Tues or Wed) until Richard gets back to you. Sorry for the delay.
  • 0 in reply to Bobby Lam95
    TI__Mastermind 23215 points

    Hello Bobby,

    Since you are looking to have a full bridge power stage, based on your reference that you used 2 UCC27712 EVM's for some testing, the UCC27714EVM-551 does have the full bridge power stage in place which will be a start. Although as you are aware, the board will have to be modified for your application.

    For the 1st question, the zener diode and transistor is for the purpose of a simple low cost 5V bias regulator. An LDO can be used for this if desired. Since the input voltage to the 5V bias is 11V to 12V there is no need for a low dropout regulator however.

    I reviewed the basic transformer specification and the transformer is a step down transformer with a turns ratio of 21:1 from Pins 3-1 to pins 10-12 and pins 7-9. So with pins 7 and 9 connected on the board the effective turns ratio is 11.5:1 from primary to secondary.

    Can you provide some more details on how you are generating the control signals for the power train? Is this a function generator, or controller?

    Regards,

    Richard Herring

  • 0 in reply to Richard Herring
    Prodigy 40 points

    Hi Richard,

    Thank you for the answer of the Vcc1 and Vcc2 power sourcing. I have made the modification on the UCC27714EVM-551 as follow: Removed T2 from the board. Use T2 pin 1 and 3 as the output. Removed R27, R28, R30, R31, R32, R33, R34, and R35. Bridged OUTA to OUTD. Bridged OUTB to OUTC. For the purpose of using my WPM signals (HI and LI) from a Microcontroller. I launched the 3 wires connector to J5 pin 3, 5, and 7. The PWM is written to generate a sine wave of 20 Khz. Vbias and Vbias2 are powered from the same bench power supply of 12V each rail. Vbulk rail comes from another power supply 0-500 Vdc. My question is why does the Vin (Vbulk) have to be present before Vbias rails come in? This is not the case with UCC27712EVM-287. Next question: if I take the enable pin (10) of U4 to an IO pin of the microcontroller to disable the part and only enable it on demand, Plus replace U4 with the "F" part for default low, will it work without having Vin on all the time? 

    To answer your question: this is a function generator. The objective is to generate a pure sine wave signal of 20 KHz that can source up to 500 Watts.

    Thank you

    Bobby.

  • 0 in reply to Robert Forsell
    TI__Mastermind 23215 points
    Hello Bobby,
    Thank you for providing the details on your modifications.
    I have one comment based on your planned implementation and usage. You mention connecting the EN pin pf U4 to the microcontroller which is also controlling the PWM inputs to the U4 GND1 referenced side. This can work but you will be connecting the GND1 and GND2 together thru your test setup. With an isolated 500V lab supply the grounds can be connected together for testing. I usually recommend making the two ground connections on the board with a soldered jumper wire (something that will not fall off). And I normally would connect the two grounds at a low noise reference such as C3 - and C4 thru C7 -. But in your case I am not sure where your output ground reference will be.
    For your questions regarding the power sequence. The EVM has the full bridge controller supplied by Vbias. When Vbias is applied the controller starts and goes thru a soft start sequence. If the bias supplies are started first, then the bulk applied the controller would have completed the soft start sequence and be running at high (effective) duty cycle to bring the output in regulation. If the 400V is applied quickly in this conditions it is basically a large VIN transient with a wide open control loop. I recommend the change of U4 to the default low, the ISO7640FMDW is a recommended pin compatible part.
    For the UCC27712EVM this is an open loop power train with the driver control signals supplied by a function generator. This case is different since when you enable some function generator outputs, some models do not have stable outputs for a number of cycles. In this case I recommend starting the bias and function generator to ensure stable gate drive signals, then slowly ramp up the high voltage input.
    Your case I think will be more similar to the UCC27712 EVM where you want to ensure you have expected drive signals before you apply Vin power. I would recommend ramping up VIn slowly to make sure the waveforms are what you expect.
    If you are going to be generating 20kHz sine wave outputs, will you be generating HI signals only on one switch node for 25us and then alternating to the other polarity? If this is the case, the boot strap capacitors (C14 and C15) may need to be reviewed to make sure the HB bias is sustained.

    Regards
    Richard Herring
  • 0 in reply to Richard Herring
    Intellectual 320 points

    Hi Richard,

    I got your point on the enable pin of U4. scratch that idea. I will use the ISO7640FMDW to make sure default low output. Yes, the microcontroller is PWM the first 25 uSec on HI and then wait the next 25 uSec, while LO is PWM the second part of the period of the 20 KHz sine wave. So, what do I need to do on the boot strap capacitors C14  and C15? My plan is to use the outputs at the switch nodes of the full bridge circuit to drive a primary winding of a step up transformer to get high amplitude sinusoidal signal. Attached is a sketch of my plan. Please advise. Thanks

    Bobby.

    modified circuit.pdf

  • 0 in reply to Bobby Lam95
    TI__Mastermind 23215 points
    Hello Bobby,
    I would look at the UCC27212 datasheet section 9.2.2.2 on selecting the bootstrap capacitor just to review the value.
    The Mosfets have a Qg of 87nC so the Qtotal from Equation 1 becomes 87nC + 120uA/Fsw= 93nC.
    Eq 2 for Cboot is 93nC/0.5V=186nF. The 0.5V is a guideline to result in low ripple on the boot cap from charging the Mosfet gate charge.
    Also with the 10k gate to source resistors, just using resulting current from 11.4V/10K. There will be 1.14mA for 25us discharged from the boot capacitor. Using dv=Idt/C there will be 0.13V drop with a 220nF capacitance.
    Based on this I would suggest increasing the boot capacitor values to 220nf and confirm the gate drive voltage levels.

    Regards
    Richard Herring