Hi Team,
Can you please help with the max current capability of PG pin of TPS53355.
Regards, Shinu Mathew.
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Hi Team,
Can you please help with the max current capability of PG pin of TPS53355.
Regards, Shinu Mathew.
Hi Mathew,
Page 7 of datasheet has PG pull down resistance with min/max information. Also, PGOOD section on page 17 recommended to pull up this pin to VREG.
To find the maximum current of this PG FET, you can take the maximum voltage of VREG divided the minimum of PG pull down resistance. However, we don't recommend tie this PG pin directly to VREG and recommended to pull up to VREG with 100kOhm. As result, the current flows through PG FET minimal when the PG signal low.
May I know your reason or concern of your question?
Kit
Hi Mathew,
Can you tell us more details how the customer plan to implement the PGOOD circuit? Will the PG circuit pull up to VREG or external power supply?
If it pull to the VREG, the VREG LDO can only handle 30mA (page 6). I can ask the IC design more details of its handling current.
Kit