Hi Sir:
I have two questions; we try to use EVENT_UP_SEL=0,Events updated anytime for DPWM normal mode so we try to avoid the event update during DPWM edges;
1\ what's the CLA delay between SAMPTRIG and Filter Output?
2\are DPWM edges including EV1,EV2,EV3,EV4?for "If DPWM edges move in or out of the Event Update Window, those transitions
may be missed, leading to DPWM pulses longer or shorter than expected."
thanks a lot;