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UCC2897A: About the design

Part Number: UCC2897A
Other Parts Discussed in Thread: PMP

Hello.

I have a question about UCC2897A.

1 In the reference design (PMP 7410) of a high voltage circuit (input: 220 V - 400 V)
The arrangement of the clamping FET and capacitor is between the primary winding of the transformer.
In EVM, it is between D and S of main SW FET.
What is the reason why the placement is different?

2 EVM uses Pch for clamping FET
Is it possible to use Nch?
Do you have reference materials?

3 Is there no calculated TOOL in the design?
Will the basic design be "Power Topologies Handbook"?

Thank you.

  • Hello Masazumi Ishii,
    The PMP7410 uses a gate drive transformer and an N channel FET to return the clamp energy to the primary.
    The EVM uses a P channel FET to return the clamp energy to the primary and it does not require a gate drive transformer.
    The two circuits illustrate the different methods of implementing an N channel and P channel active clamp forward topology.

    There is a comprehensive list of reference material for this part on the webpage. You will find datasheets, application reports, a plethora of reference designs and an Excel calculator tool located here:
    www.ti.com/.../technicaldocuments
    Regards
    John