Other Parts Discussed in Thread: PMP
Hello.
I have a question about UCC2897A.
1 In the reference design (PMP 7410) of a high voltage circuit (input: 220 V - 400 V)
The arrangement of the clamping FET and capacitor is between the primary winding of the transformer.
In EVM, it is between D and S of main SW FET.
What is the reason why the placement is different?
2 EVM uses Pch for clamping FET
Is it possible to use Nch?
Do you have reference materials?
3 Is there no calculated TOOL in the design?
Will the basic design be "Power Topologies Handbook"?
Thank you.