• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 63 subscribers
  • Views 294 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS544C20: About precharge operation

Yuto Sakai
Mastermind 6100 points
Part Number: TPS544C20
Other Parts Discussed in Thread: TPS544B20,

Hi,

Is it possible to precharge the output voltage for TPS544B20 or TPS544C20?
If it is possible, what percentage of the set output voltage can be precharged?

Best regards,
Yuto Sakai

  • 0
    TI__Prodigy 240 points

    Hi Sakai-san,

    Yes it is possible to precharge or "pre-bias" the output voltage for the TPS544B20 and TPS544C20 devices.  Page 17 of the Datasheet for these devices highlights this feature in "8.3.2 Pre-Biased Output Start-Up".

    The percentage to which the output can be precharged or "pre-biased" is an excellent question.  In order to answer this question please consider the following text from the datasheet:

    No SW pulses occur until the internal soft-start voltage rises above the error amplifier input voltage (FB pin), if the output is pre-biased. When the soft-start voltage exceeds the error amplifier input, and SW pulses start, the device limits synchronous rectification time after each SW pulse with a narrow on-time. The low-side MOSFET on-time slowly increases each switching cycle until it generates 128 pulses. After 128 pulses, the synchronous rectifier runs fully complementary to the high-side MOSFET. This approach prevents the sinking of current from a pre-biased output, and ensures the output voltage start-up and ramp-to-regulation sequences are smooth and monotonic.

    In theory there is no limit to the maximum percentage of pre-bias start-up voltage, but if the device is allowed to complete the soft-start sequence without triggering the 128 switching cycles the device will remain in DCM operation, which can result in undesirable behavior during load current changes such as excessive undershoot of the output voltage when a load is applied.  It is recommend to allow for >128 switching periods between the reference exceeding the pre-biased voltage (Vpb) and completing soft-start.  This means varying TON_RISE, and Switching Frequency (Fsw) will then dictate the maximum percentage of interest.  Please see the following example:

    TON_RISE > (128/Fsw)/(1 - (Vpb/Vout))

    Consider the case where: TON_RISE = 2.7ms, and Fsw = 500kHz, then:

    a) 2.7ms > (128/500kHz)/(1 - (Vpb/Vout))

    b) 2.7ms > 256µs/(1 - (Vpb/Vout))

    c) 1 - (Vpb/Vout) > 256µs/2.7ms

    d) 1 - (Vpb/Vout) > 0.0948

    e) 1 - 0.0948 >  Vpb/Vout

    f) ~0.905 > Vpb/Vout

    Here we see that based on these parameters the pre-biased voltage (Vpb) can be 90.5% of the output voltage (Vout).

    Regards,