BQ78350-R1: ManufacturerAccess() 0x001B Cell Balance Toggle

Hi Adam,
With the odd/even toggling of the balance FETs the resistive cell simulator will move dramatically. It will be more apparent with external balance FETs since the internal balance path is low current while the external balance path can be high current.
I'm not sure if the signals you show are reported voltages or measured voltages at the cells. Normally with low impedance cells the voltage should not change with balancing, but artifacts may be observed at the group boundary (cells 5 & 6) due to common path resistance with the un-synchronized sampling, and on the low cells due to filter settling. With the high impedance resistor cell simulator and all cell voltages moving due to the resistor, all reported voltages are likely to change.
The cell balance toggle actually sets odd and even bits in the registers without influence by the AFE cell map. If you have 4 cells in a group the odd balance setting will attempt to balance the adjacent cells (3 and 5 of the group) and the one external balance FET will not be able to turn on. If you have 3 cells in the group neither the even nor odd will turn on adjacent cells.
Test methods may vary. Controlling group voltages with low impedance sources will reduce cell movement. Testing with controlled voltage will allow identification of the current flow. For example if the voltage is lowered on most cells and raised on the one to be tested, current flow can be checked on that cell. With the adjacent cell situation if one cell is below the effective turn on of the external FET, the other cell should be able to balance. With a capable system with multiple sources use appropriate programming. With a simple system move a source to the cell to be tested.

Select a test method which fits your available equipment.