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TPS50601-SP: Master/Slave with SYNC signal

Part Number: TPS50601-SP

I'm a little confused about the phase of the clocking signals if two TPS50601-SP devices are configured to operate in a Master/Slave configuration using the SYNC signal to connect the two. This is to configure a dual phase converter.

With the RT pin floating, the master will clock at 500 kHz.  Its SYNC output is inverted from the switching clock used in the Master. 

Since the Slave device is configured to operate with an external clock being fed to its SYNC pin, does this clock get inverted internally in the slave? This would make the switching clock of the slave align with the switching clock of the master. This is the result we see in Pspice simulation. 

To get the phases to be 180 deg out of phase, do i need to add an external inverter on the Slave's SYNC input? 

  • Hey Mark,

    The TPS50601-SP inverts the signal when in slave mode internally. This should make them 180 degrees out of phase.

    This is discussed on page 19 of the TPS50601-SP datasheet.

    Thanks,

    Daniel

  • Hi Daniel,
    This is helpful, but I still want to verify what would the switching clock relationship be between the master and slave. The text on page 19 is confusing as to the phase of the SYNC output of the master. The table on page 20 indicates the SYNC output is 180 degrees out of phase with the internal switching clock, which is what Spice simulation shows. With the slave inverting this clock, both switchers would be switching on the same phase. This is also what simulation shows. Is this correct?
  • Hey Mark,

    I see the issue now. Our datasheet is saying two different things on page 19 and page 20.

    I will say I just tested this in lab and the Phase pin and Sync pin for the master should be in phase. The slave would then be the one inverting the signal.
    The master/slave clocks will be out of phase in reality regardless of what the model says.

    Are you using the SPICE models provided by us?
    If so, I need to check out the models we provide.

    Thanks,
    Daniel
  • Hi Daniel,

    Thanks for checking. I don't have an EVM to verify this.

    Yes these are our (TI) models. Both the Pspice and the TINA model are similar in this regard.

    There is even another E2E forum post about the SYNC pin on the Pspice model and the reply shows the clock inversion.

     

  • Hey Mark,

    The sync pin will be out of phase with the internal oscillator if there is an Rt resistor, but should change when there is no Rt resistor/its in master mode.
    It is possible this was missed during model development, this is currently a topic of internal discussion.
    I am currently looking into fixing this issue/clarifying what everything should be.

    Thanks,
    Daniel
  • Hey Mark,

    We got a confirmation that the master/slave functionality of the device was never added into the model. We do not have plans to add it in at this time.

    Thanks,
    Daniel
  • Thanks for confirming.
    A related question: If we wanted to connect a third TPS50601-SP to the same Master SYNC signal but configured for a different voltage output, is this possible? Basically there would be three TPS50601 devices in the circuit, the first two connected as a dual-phase converter with one as the master, the second as the slave, and a third converter synchronized to the same SYNC signal but otherwise operating independently of the other two. The slave and the third converter would be switching in the same phase.
  • Hey Mark,

    I don't believe there will be any issue with this. The slaves should sync up just fine.

    Thanks,

    Daniel