• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 63 subscribers
  • Views 302 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LM5050-1: Vgs Spec Enquiry

Philip
Expert 1510 points
Part Number: LM5050-1

Hi,

With Vin=20V, Iin/Iout=1.2A, noticed that the Vgs level is only around 4V till 5V.

Under LM5050-1 Vgs spec, with Vin 12V to 75V, typical Vgs will be 12V.

1) Can you help to advise what are the possibilities the waveform will be lower than 12V?

2) If Vgs is lower than 12V, does this mean the MOSFET is not fully turned ON? Can you help to explain the meaning of Vgs parameter here?

3) What are the parameters to fully turned ON the MOSFET? Please help to advise.

Thanks.

  • 0
    TI__Genius 16305 points
    Hello

    LM5050-1 regulates the forward voltage across the MOSFET source-drain to 22mV at nominal current (FET RdsON at Vgs 4.5V is selected based on nominal current, RdsON(Vgs=4.5V) is selected to be 22mV/nominal current).
    During normal operation, 22mV will be seen and gate of the MOSFET is controlled (will not be fully enhanced, it will be about 4.5V) if the current goes beyond nominal value, gate voltage is increased so that RdsoN is reduced to achieve 22mV source-drain drop at still that higher current.
    If the load current goes lower than nominal current, gate voltage is lowered to increase the RdsON and 22mV regulation is achieved.
    At very high currents, gate voltage is saturated to max voltage specified in the spec table.
    Vgs spec in the datasheet is specifed for VIN-OUT = 175mV. This means that LM505-1 is gone out of forward regulation and gate is fully enhanced.

    So, 4V Vgs is due the fact that it is still in regulation and what is seen is expected.

    Regards,
    Kari.
  • 0 in reply to Karikalan Selvaraj
    Expert 1510 points

    Hello Kari,

    Thanks for your feedback.

    I have additional questions (refer bold font), please help to advise, thanks.

    LM5050-1 regulates the forward voltage across the MOSFET source-drain to 22mV at nominal current (FET RdsON at Vgs 4.5V is selected based on nominal current, RdsON(Vgs=4.5V) is selected to be 22mV/nominal current).
    During normal operation, 22mV will be seen and gate of the MOSFET is controlled (will not be fully enhanced, it will be about 4.5V) if the current goes beyond nominal value, gate voltage is increased so that RdsoN is reduced to achieve 22mV source-drain drop at still that higher current.

    Question: At Vgs~4V, MOSFET is not fully enhanced even though you exceed Gate voltage threshold (Vth) of the MOSFET? (i.e some MOSFET Vth=2V only). Is my understanding correct?

    If the load current goes lower than nominal current, gate voltage is lowered to increase the RdsON and 22mV regulation is achieved.
    At very high currents, gate voltage is saturated to max voltage specified in the spec table.
    Vgs spec in the datasheet is specifed for VIN-OUT = 175mV. This means that LM505-1 is gone out of forward regulation and gate is fully enhanced.
    So, 4V Vgs is due the fact that it is still in regulation and what is seen is expected.

    Question: Do you have similar graph across temperature? Since Vsd regulation varies quite a lot..

    Best Regards,

    Philip