TPS65094: TPS65094

Thank you for your prompt reply.

When I debug test card.I found  TPS650942 BUCK2 always 0  V, So I doubt chip has no programmed ..

Where is the problem？

Hi Nick,

Follow your advice.according to DataSheet (TPS65094) 6.4.5--Power Sequencing and VR Control,I fiound a strange phenomenon,Signal RSMRSTB was high  but when I connect to SOC-RSMRST_B Pin.This RSMRSTB  signal occurred regularity shock and Other BUCKS also regularity shock.

Shi,

Can you try reading the OFFONSRC, PWR_FAULT_STATUS1, and PWR_FAULT_STATUS2 registers after this happens? This is the best way to tell what is causing an issue.

If you can't read those registers then I would get a close up picture of each rail with the RSMRSTB signal, so we can try to narrow down which rail, if any is causing a problem.

Hi Nick 

I used usb2any read OFFONSRC, PWR_FAULT_STATUS1,PWR_FAULT_STATUS2 registers as following picture 

OFFONSRC:

 PWR_FAULT_STATUS1:

PWR_FAULT_STATUS2:

So  OCP ， CRITTEMP  is key of the problem 

Shi,

There are two things the PMIC is reporting.

1. The PMIC has been shut down by the host.
2. The PMIC has been shut down due to UVLO.

Your issue should be one of those two things. You could try writing "0C" to the OFFONSRC register to clear these bits, then try reading it again after the issue shows up, so we can see which one of these two bits is being set because of this issue. If it is being shut down by the host, then you should check the PMICEN pin, and if it is being shut down by UVLO you should check the VSYS pin.

The other two registers you checked were the PWR_FAULT_MASKx registers, not the PWR_FAULT_STATUSx registers so that doesn't give us information on what is causing the shutdown. However, since the ONOFFSRC register is not reporting a power fault the PWR_FAULT_STATUSx registers should just be "00" anyway.

Nick .

1. I writen"0C" to the OFFONSRC register to clear these bits, .then read this register the value became "00".and  VSYS pin always 12.9V  (DC Power in),PMICEN pin always 3.3V (control by CPLD).But when I reset CPLD PMICEN 0->1 and read this register  the value became "08"

2. PWR_FAULT_MASK1:

PWR_FAULT_MASK2:

And I want  know the normal configuration information ?  Thank you

Shi,

After resetting CPLD I would expect the OFFONSRC register to be "08". However, if that is all the OFFONSRC register is reporting, even after the issue you were seeing shows up, then that would mean something is causing the PMICEN pin to be pulled low periodically (roughly every 145ms based on the scope shot you sent).

The normal configuration for the TPS650942 should already be on the device. The PWR_FAULT_MASK registers you show here have the correct values.

Nick,

When I  change another mother board ，RSMRSTB has no appeared  every 145ms changed  ，Following the Datasheet   6.4.5.1 Cold-Boot power sequence . The signal SLP_S4B is always "0V" ，

Shi,

It sounds like this new issue might be a bad solder connection. If you can get SLP_S4B working again I would try checking the Rail 3 SVID ID setting in the Flash Image Tool. It should be set to I2C. My thought is maybe your processor is not setting the BUCK2 voltage, and so it is resetting the PMIC in an attempt to fix the problem.

Shi,

Any updates on this issue?

Nick ,

Thank you for your attention.These days we  sent it to PCB factory  re-welded.And waitting for return.To be fankly I haven't found the problem yet.

Shi,

No problem. Let me know what you find out when you get the boards back. I will check in if I don't hear anything for a while.

Hi Nick,

Could you tell me you e-mail adress . I want send our schematics and estimate it  reasonable or not ?

Thank you