Hi team,
when EN=low, how much the sink current of the output stage is?
Regards
Robin Liu
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Hi team,
when EN=low, how much the sink current of the output stage is?
Regards
Robin Liu
Hello Robin,
I work with our isolated gate drivers and I will be happy to assist you.
When EN = low, a low signal to transmitted across the isolation barrier much like INA or INB = low.
Therefore, the sink capability is the same, 6A typical.
If this answered your question, please press the green resolved button.
Regards,
Mateo
Hi mateo,
thanks for you reply.
Please refer to the detail scenario as below:
the customer use the UCC21521 to drive the LLC stage second side full bridge,
When they try to make the full bridge works like a passive rectifier, they set EN=low. The issue is that there is a small pulse output on the Vgs of the high side SiC FET.
Please refer to the picture. The low side is OK. The Vgs would be locked at 0V. but the high side Vgs, there is a small pulse.so the customer doubt the sink current ability.
Could help to analysis on this? Thanks.
the low side Vgs | the high side Vgs |
Regadrs
Robin Liu
Hello Robin,
Thank you for the scope captures.
Is channel 1 Vds?
What is the SiC FET part number that your customer is using?
Lastly, can you post the schematic? This will help me look for issues.
Regards,
Mateo
Hi Don,
Thanks for your response and sorry for long time no update.
because this issue didn't stuck the customer test&debug process, so they continue for further step.
but this small pulse still could be a issue.
i send you the schematic by private message. Thanks.
Regards
Robin Liu