LM5145: Question about LM5145 and LM5175 Synchronous operation.

Hi Bob,

The LM5145 is designed to accept a SYNC signal directly. We have not tested it with a capacitvely-coupled signal. My recommendation is to test your proposed circuit to ensure it meets the required circuit peformance.

I inserted answers to your questions as follows:

Q1
Is it possible to perform FPWM and frequency SYNC operation with the addition of MOSFET shown below?
Is there no problem?

[TH} Looks acceptable. When the MOSFET is off, the SYNCIN pin will pullup to VCC. Note that a continuous high on SYNCIN corresponds to FPWM operation.


Q2
Is there a specification of the input capacitance of the SYNC pin when adding a MOSFET?
When 5 kΩ PU, the load of VCC increases by about 1.5 mA, but is there a problem within 20 mA in total with SW operation?

[TH] The loading on VCC (including the current required to drive the power MOSFETs) should be less than the minium current limit spec of the VCC regulator.



Your answer
"In terms of the LM5145's SYNCOUT signal, the recommendation is to measure the amplitude applied to the LM5175's RT/SYIN pin to verify it does not exceed the specification".

Q3
Is it confirmed by actual measurement?
In case
We are concerned about troubles due to thermal characteristics and product variations.

[TH] I have not performed any testing, hence my recommendation to perform the appropriate measurements.


Q4
Clamping is considered with SBD etc. separately from 3.3 V power supply so that the RT / SYNC pin does not become 3.3 V or higher, but how much is the upper limit of tolerance for 3.3 V?

[TH] Please review the datasheet for the LM5175. While the abs max value of the LM5175's RT/SYNC pin is 6V, it is recommended to not exceed 3.3V during normal operation. If you AC couple a 0V to 3.3V to the LM5175's RT/SYNCIN, it will be level shifted lower and the peak level should not exceed 3.3V.

Q5
Or Csync is set to 1000 pF [From EVM]
How much is the external signal amplitude recommended value?
(To satisfy the RT / SYNC pin voltage upper limit 3.3 V, H threshold 2.1 V min, L threshold 1.2 V max)

[TH] The series capacitor provides DC blocking. A 0 to 3.3V input signal with pulse width between 75ns and 500ns is acceptable.


Regards,
Tim

Hi Bob,

Due to inactivity, I am going to close this thread. Please open a new thread if you have any additional questions.

Best Regards,
Katelyn