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TPS65910: OFF state of TPS65910

takahiko yokota
Mastermind 7135 points
Part Number: TPS65910
Other Parts Discussed in Thread: TPS65217

Hi


I have a question about OFF state of TPS65910.
If PWRHOLD is low, is this device disable?

Best Regards,
Yokota
  • 0
    TI__Mastermind 30310 points
    Yokota-san,

    This answer can be found on pages 45-46 of the datasheet. Figure 6-1. Embedded Power Control State-Machine shows a state machine diagram and the preceding text explains the events in more detail:

    The device will go from ACTIVE to OFF state (or from SLEEP to OFF state) if the PWRON pin is toggled low for a time of at least 550ms (tdbPWRONF: PWRON falling-edge debouncing delay) but not long enough to cause a long-press (~8 seconds).

    The device will go from ACTIVE to SLEEP state if the PWRHOLD pin is pulled low.
  • 0 in reply to Brian Berner
    Mastermind 7135 points

    Hi Brian-san

    Thank you for the reply.
    Please let me ask you more question.
    My customer will design the constitution.

    Power OFF
    　Long press button switch⇒ FPGA ⇒ Off processing by AM335x ⇒ FPGA ⇒ 　　TPS65910 Disable
    Power ON
    　Press button switch ⇒ FPGA ⇒ TPS65910 Enable

    Could I execute above PWROFF/ON operation if I design as below?

    PWROFF
       Set the PWRHOLD=Low after PWRON was low by long press push button
    PWRON
       Set the POWRON=Low 

    Best regards,
    Yokota

  • 0 in reply to takahiko yokota
    Mastermind 7135 points

    Hi Brian-san

    I'm sorry but please let me confirm you just in case.
    You answered "The device will go from ACTIVE to SLEEP state if the PWRHOLD pin is pulled low.", but I couldn't find that sentence in datasheet.
    Are there that sentence in datasheet?

    Best regards,
    Yokota
  • 0 in reply to takahiko yokota
    TI__Mastermind 30310 points

    Yokota-san

    I apologize, the PWRHOLD pin does not cause ACTIVE to SLEEP transition for the TPS65910 device. Other products have a similar pin, named PWR_EN (the TPS65217 for example), which can allow the PMIC to enter sleep state.

    The PWRHOLD pin is defined as follows:

    6.3.3.2 PWRHOLD When none of the device power-on disable conditions are met, a rising edge of this signal causes an OFFto-ACTIVE state transition of the device and a falling edge causes a transition back to OFF state. Typically, this signal is used to control the device in a slave configuration. It can be connected to the SYSEN output signal from other TPS659xx devices, or the NRESPWRON signal of another TPS65910 device. This input signal is level sensitive and no debouncing is applied.

     

    The TPS65910 has a dedicated SLEEP pin for controlling the ACTIVE to SLEEP state transition.

  • 0 in reply to takahiko yokota
    TI__Mastermind 30310 points

    I add comments in Bold.

    "PWROFF

      Set the PWRHOLD=Low after PWRON was low by long press push button (6s before interrupt, 8s before PMIC power-off automatically)

    PWRON

      Set the PWRON=Low (>550ms minimum, <6s)"

    Yes, this will work as long as PWRON is connected to a physical push-button and resets to High. PWRON pin responds to toggle (Hi-->Lo-->Hi)

  • 0 in reply to Brian Berner
    Mastermind 7135 points

    Hi Brian-san

    Thank you for the confirm.
    If physical switch connect the PWRON through FPGA, could I execute customer's spec?

    Best regads,
    Yokota

  • 0 in reply to takahiko yokota
    TI__Mastermind 30310 points
    Yokota-san,

    A tactile push-button switch is best. When push-button is released, PWRON pin is high and long press does not occur accidentally.

    A standard SPST (ON-OFF) slider switch is not ideal. If this switch stays in OFF position for more than 8s, the PMIC will trigger the system reset automatically.
  • 0 in reply to Brian Berner
    Mastermind 7135 points

    Hi Brian-san

    I'm sorry to bother you over and over.

    Please let me confirm you about ON sequence of TPS65910 just in case.
    If DEV_ON control bit sets 1 or PWRHOLD is High within TdOINT1 after PWRON was low over tdbPWRONF, does TPS65910 is power on?

    Best regards,
    Yokota
  • 0 in reply to takahiko yokota
    TI__Mastermind 30310 points

    Yokota-san,

    No problem. Your understanding of the device operation is very close to perfect. I correct your statement with BOLD letters.

    "TPS65910 device powers-on after PWRON was low over tdbPWRONF. It takes the TPS65910 device tdSONT to execute power sequence. If DEV_ON control bit sets 1 or PWRHOLD is High within tdSONT + tdONPWHOLD, then TPS65910 stays on"

    Figure 5-4. PWRON Turn-On/Turn-Off in the TPS65910 datasheet shows this clearly.

    tdOINT is a separate timer: After PWRON was low over tdbPWRONF, NRESPWRON will go low because PWRHOLD take too long to change to high state. If tdOINT end before PWRHOLD is high, TPS65910 sequences down power supply rails until next PWRON event. This is why it is shown with a dotted line in Figure 5-4.

    tdSONT + tdONPWHOLD = tdOINT = 1s