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LM5166: 100% mode transition, COT operation

Mark Pieper
Expert 4640 points
Part Number: LM5166

Hi,

Please describe operation during the transition to 100% duty cycle mode while in COT operation. Is there a minimum OFF time specification when in COT mode?

We are seeing Vout fall during pulse loading with reduced Vin without any extension of the COT on-time. Specified Vin for this converter is 30V-42V, Vout=24V, f=200KHz. With 32V in, measured off time is 300ns during the pulse load, efficiency ~80%.

It looks to me like the converter is saturating with a min off time limitation, but there isn't a spec for that parameter. Referring to the below trace, the light blue is the Vout during pulse load. You can see that steady state Vout decreases during pulse load by about 50mV. When Vin is increased, this offset goes away and the steady state Vout during light and heavy load is the same. We realize that this 50mV is small compared to the 24V output, but we need to understand the cause of this phenomenon.

Thanks.

  • 0
    TI__Expert 4640 points

    It looks like the image is missing. I'll try again below.

  • 0 in reply to Mark Pieper
    TI__Guru 73742 points
    Hi Mark,

    Please send the schematic and a completed quickstart file for this design so we understand how the FB ripple is generated.

    Note that if the input is 30-42V, it’s not near dropout for a 24V output. Also, a Toff-min limitation does not apply here as the LM5166 has a p-channel high-side FET.

    In dropout the FET stays on until the FB hysteresis voltage in COT (4mV) is exceeded. Also, layout of the feedback resistors is particularly important – the lower feedback resistor must be close to the FB and GND pins.

    Regards,
    Tim
  • 0 in reply to Timothy Hegarty
    TI__Genius 11040 points
    Hi Mark,

    I want to follow up on your request. Would you be able to share the schematic and the completed quickstart file?

    Thank you,
    Katelyn
  • 0 in reply to Katelyn Wiggenhorn
    TI__Genius 11040 points
    Hi Mark,

    Due to inactivity, I am going to close this thread. If you have any additional questions, please open a new thread.

    Best Regards,
    Katelyn
  • 0 in reply to Katelyn Wiggenhorn
    TI__Expert 4640 points

    Hi Katelyn,

    You can go ahead and close this thread. The answer to the question is that the feedforward capacitor influenced behavior near dropout to extend an operating region where the converter is effectively in a fixed frequency max duty cycle mode. This is primarily due to the fact that with Cff the ripple is coupled to FB directly, yet reductions in Vout show up on FB reduced by the divider gain. As Vin is further reduced, and Vout falls as a result of that, eventually the point is reached where the FB ripple peak falls below the 4mV FB hysteresis and the pulse stretching occurs, which eventually turns into 100% duty cycle mode. This behavior show up in simulation, so that is an effective tool for investigating this.

    Regards,

    Mark

  • 0 in reply to Mark Pieper
    TI__Genius 11040 points
    Hi Mark,

    Thank you for sharing this further description. I am happy to hear your problem is solved.

    Best Regards,
    Katelyn