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UCD3138HSFBEVM-029: Parameter setting problem for UCD3138 nonlinear control method

Part Number: UCD3138HSFBEVM-029
Other Parts Discussed in Thread: UCD3138

Hello, I recently debugged the PID parameters of the UDC3138-based full-bridge dcdc power supply.
I am confused about the nonlinear PID of the UCD3138.
In the manual, the A-G 7 group PID parameters can be set by setting 7 limit values ​​of BIN0-BIN6.
I learned the firmware of the UCD3138's full-bridge dcdc development board, where filter0's limit0-limit5 is configured as 0, 25, 25, 25, 31, 31.
I understand that when the error signal is larger than the corresponding limit value, the corresponding PID coefficient is selected. Generally, the larger the error signal, the larger the bandwidth of the corresponding PID, which is to better adjust the dynamics of the system.
However, I don't quite understand some places.
First, is the magnitude of the error signal generated by the input step and the load step? When the amplitude of the input step and load step becomes larger, the time becomes shorter, and the error signal generated becomes larger?
Second, when the input voltage and load are stable, the power supply enters a steady state. Is the error signal at this time even the smallest, or even close to 0?
Third, how should I measure the size of the error signal? For example, when the load is reduced from 40A to 20A within 10us, how much error signal will it generate? 10mV? 30mV? 50mV? Can this error signal be calculated? Or can it be measured? For example, when the input voltage is increased from 20V to 50V, how much error signal will it generate?
Fourth, according to what settings, such as the limit value of 0, 25, 25, 25, 31, 31 given in the reference firmware? Because I don't know how big the error will be.
Fifth, I can test the Bode diagram when the power supply is stable. So to determine the PID coefficient of group A, then the coefficient of B-G, how to determine? Is it necessary to debug the PID coefficient of a group A to make it larger than the previous bandwidth? Then copy this set of coefficients into Group B, so that the bandwidth of the PID coefficients of Group B is larger? And so on, to set up the C-G group?

  • You can't calculate the error value by the load step directly. Depending on the power supply characteristics, you will get different error values. You need to look at the signal on the EADC pin. The difference between the level and the setting of the EADC DAC will give you the error value. Yes, at steady state, the error signal will be right around 0. For nonlinear modes, generally you want each set of coefficients to be stable. So you can test each set of coefficients in linear mode, and then put the wider bandwidth ones at the bigger error ranges. I think that's what you said. That way it can be nice and stable and quiet on steady state, but still give better response at larger error values.
  • Thank you for your advice, I seem to understand it.
    Will the numbers 0, 25, and 31 set in the firmware correspond to 0mV, 25mV, and 31mV?
    When the power supply is changing dynamically, I measure the EADC port of the output voltage Vo and observe the variation of the voltage sample value here. Is this voltage change amount the corresponding limit value?
    For example, when the voltage variation is 50mV, the PID above the 31mV limit is used. When the voltage variation is 10mV, the PID between 0-25mV is used. Is this the case?

    ZJYL
  • You've got it right.