Hi team,
My customer uses TPS53219A for 12Vin to 3.3Vout.
The enable pin is controlled by CPLD and VDD is connect to 12Vin which is the same with input.
Is there any concern if enable signal is earlier than VDD/12Vin?
Thank you.
Regards,
Allen
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Hi team,
My customer uses TPS53219A for 12Vin to 3.3Vout.
The enable pin is controlled by CPLD and VDD is connect to 12Vin which is the same with input.
Is there any concern if enable signal is earlier than VDD/12Vin?
Thank you.
Regards,
Allen
Allen,
TPS53219A has a UVLO function for VDD, internal regulator so I do not expect any problem in your use case.
Regards,
Mathew