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UCC28780: UCC28780 survival mode of VDD

user5781628
Intellectual 970 points
Part Number: UCC28780

Hi，

In datasheet it mentions survival mode of VDD. I have some question about it:

1. It said "The regulator initiates unlimited PWML pulses when VVDD drops lower than 11 V".

how to understand "unlimited PWML pulses"?

2. It said "To prevent the controller from getting stuck in survival mode continuously or toggling between SBP and survival mode at zero load."

Why it will be stuck in survival mode continuously?

3. It said "VDD capacitor should not be over-sized". 

What is the result if big VDD capacitor?

You know, ACF has deep burst mode, there should be big VDD capacitor during deep SBP.

So it should be with big VDD capacitor to support the energy at deep SBP mode.

BR

  • 0
    TI__Guru 74115 points
    1. when VDD drops lower than 11V, PWML will continuously send out pulses until VDD reaches above 11V. The number of PWML pulses is not limited, so sending out as many as needed until VDD > 11V.

    2. If VDD designed very close to 11V, then there are more chances VDD drops lower than 11V, and after enter survival, VDD is brought back to > 11 V. But since VDD is designed at nearby 11V, VDD can get to lower than 11V quickly in light load operation, then enter the survival mode again, such operation will back and forth at this operation condition - meaning "stuck" in survival mode continuously.

    3. If VDD capacitor value is too large, and during load step down transient, there will need many PWML pulses to get VDD > 11V if the survival mode entered. If smaller VDD capacitor, there will be less PWML pusles. As in load step down, Vout will typically in overshoot, so too many PWML pulses, will make Vout further overshoot. So it is desired to use a VDD capacitor not too big.

    4. A proper VDD capacitor value will need to consider the output capacitor value, a rule of thumb is a VDD capacitor should be designed just able to make the converter to startup into regulation. So there will be some adjustment to decide a final value for VDD capacitor value.
  • 0 in reply to Hong Huang
    TI__Guru 74115 points
    I have not received any additonal messages for the past week. I will close this thread. You can open a new thread if you have additional questions.
  • 0 in reply to Hong Huang
    Intellectual 970 points
    Hi,

    In datasheet, it said "To prevent the controller from getting stuck in survival mode continuously or toggling between SBP and survival mode at zero load."
    It is to say that the VDD for UCC28780 should be higher than 11V even at 0A load, right?
    If yes, it needs to keep high capacitor to provide more energy for deep SBP mode at 0A.
    But it also says that it is not suggested to use large value capacitor for VDD.

    So it seems that the datasheet is self-contradictory.
    How can we select the right capacitor for VDD.

    BR
  • 0 in reply to user5781628
    TI__Guru 74115 points

    The VDD capacitor selection needs a balance. I have answered your questions in my previous reply with four points. It is better to keep this talking based on my reply of that four points. List here again. Please ask if anything on this list needs further explanation. Also, this thread is closed. Please start a new thread.

    • 1. when VDD drops lower than 11V, PWML will continuously send out pulses until VDD reaches above 11V. The number of PWML pulses is not limited, so sending out as many as needed until VDD > 11V.

      2. If VDD designed very close to 11V, then there are more chances VDD drops lower than 11V, and after enter survival, VDD is brought back to > 11 V. But since VDD is designed at nearby 11V, VDD can get to lower than 11V quickly in light load operation, then enter the survival mode again, such operation will back and forth at this operation condition - meaning "stuck" in survival mode continuously.

      3. If VDD capacitor value is too large, and during load step down transient, there will need many PWML pulses to get VDD > 11V if the survival mode entered. If smaller VDD capacitor, there will be less PWML pusles. As in load step down, Vout will typically in overshoot, so too many PWML pulses, will make Vout further overshoot. So it is desired to use a VDD capacitor not too big.

      4. A proper VDD capacitor value will need to consider the output capacitor value, a rule of thumb is a VDD capacitor should be designed just able to make the converter to startup into regulation. So there will be some adjustment to decide a final value for VDD capacitor value.