I have a 420VDC source and want to use a 700V switch with an 80% voltage derating during secondary conduction, so there will be a 140V flyback voltage.
Now, as I understand it, the chip will limit switching frequency to maintain a maximum 47.5% secondary conduction duty cycle. So, with 420V on the primary during the on-time (t1) and 140V during the off-time (t2) the t2 to t1 ratio is 3:1. Now, to operate near 80kHz in these conditions means the transformer design must provide the output power limit with t1=2.00µs, t2=6.00µs and t3=4.63µs. And to operate at any other maximum frequency, with these parameters, the t1, t2, t3 duty cycles must be still be 15.83%, 47.5%, 36.67%. Is this correct?