• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 63 subscribers
  • Views 363 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UC2825A: Minimum pulse-width requirements for the UC2825A

David C
Expert 3350 points
Part Number: UC2825A

I’m working in the lab with a power supply prototype and I’m wondering if there are minimum pulse-width requirements for the UC2825A?

As I run the input voltage up on my supply, the duty cycle shrinks.  I get to a certain pulse-width (~700ns) and the controller starts pulse-skipping.  I’ve looked for a bad ramp, noise on the error-amplifier, or current-limit, but they all look clean.

I reduced the switching frequency from 187kHz to 140kHz and I was able to bring the input voltage up to a higher level before pulse-skipping began.

Any thoughts on this would be appreciated.

  • 0
    TI__Mastermind 31580 points
    Hi David,

    There is a limitation based on how well defined the bottom of the ramp is and the threshold and delays of the PWM comparator. As you go to lower frequencies you will find that the minimum duty cycle that you can drop to before the controller starts to skip pulses gets smaller but its probably a fixed pulse width in time, so as the frequency increases the effective min duty falls.

    Most of the applications for these controllers run at 50kHhz to 130kHz, well below the conducted emi limit line which starts at 150kHz.

    Regards

    Peter