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UCD3138HSFBEVM-029: Load step problem of switching power supply based on UCD3138

zoujiangyilang
Genius 4560 points
Part Number: UCD3138HSFBEVM-029
Other Parts Discussed in Thread: UCD3138

Hello
I recently designed a 200W full-bridge switching power supply prototype based on your UCD3138 full-bridge hard-switch development board.
I tested the load step of the prototype I designed. The load jumps from 20A to 40A, then from 40A to 20A, the transition time is 10us, and the transition rate is 2A/us.

When the Bode diagram bandwidth of the prototype is 4.3 kHz, the amplitude of the overshoot and the amplitude of the sag are about 900 mV when the load jumps.

I optimized the PID coefficient and increased the bandwidth to 10 kHz for a load jump.

I thought that both the amplitude of the overshoot and the magnitude of the sag will decrease when the load jumps. However, strange things happened.

The load jump is that the amplitude of the undershoot drops to 410mV, while the amplitude of the overshoot does not change substantially, is 930mV. Why?

I thought that the bandwidth will increase, the amplitude of the overshoot and the amplitude of the undershoot will decrease.

However, the overshoot has not changed, I really can't understand.

How can I adjust and reduce the amplitude of the upper and lower amplitudes? Can only increase the output capacitor?

  • 0
    TI__Mastermind 18370 points
    An expert will get back to you soon.
  • 0 in reply to zoujiangyilang
    TI__Genius 14580 points
    You need increase output cap. If the output cap can't supple enough instant current, the voltage drop.
  • 0 in reply to Sean Xu
    Genius 4560 points
    Hello.
    Yes, increasing the output capacitance reduces the magnitude of the load step.
    I have seen a blog from your TI. The article describes that the magnitude of the load step is inversely proportional to the capacitance of the output capacitor and the bandwidth of the loop. That is, increasing the capacitance of the capacitor or increasing the bandwidth can reduce the magnitude of the load step.
    I tried to increase the capacitance of the capacitor and the system bandwidth to reduce the magnitude of the load step. But there are two problems:
    1. As shown in the figure above, I increased the bandwidth from 4 kHz to 10 kHz, and the load step undershoot was reduced by half, while the overshoot did not change. I am very confused, why is there no improvement in the overshoot?
    2. In addition to increasing capacitance and bandwidth, is there any other way to reduce the magnitude of the load step?
    Thank you
  • 0 in reply to Sean Xu
    Genius 4560 points
    Another problem is that if I increase the output capacitance again, the resonant frequency of the main power of the power supply will decrease, thereby limiting the bandwidth and reducing the phase margin. Therefore, increasing the output capacitance too much will reduce the bandwidth, which is a contradiction. I am very confused about this.