UCC2897A: Question about reference design-PMP5123

chentsu chung

Mastermind 6180 points

Part Number: UCC2897A
Other Parts Discussed in Thread: PMP5123,

Hi,

1. According to PMP5123, the input voltage range is 8~36V

But in the datasheet of UCC2897A:

The startup voltage should be 12.7V, and 8V startup.

Could you explain this?

2. In the PMP5123, there is a circuit:

May I know what is the purpose and how it works?

Thank you very much!

over 6 years ago

0 Benjamin Lough over 6 years ago

TI__Mastermind 27105 points

Hi Chentsu,

Thanks for your interest in PMP5123. This circuit is used to apply a voltage to the VIN pin that is greater than the UVLO threshold even when the input voltage is 8V. The op amp is used as an oscillator that drives the BJT pair. When Q7 is on, current flows from Vin through diode D12 and charges C27. When Q7 is turned off and Q8 turned on, the capacitor is now referenced to Vin. This makes the voltage on the capacitor referenced to Vin and the resulting voltage applied to pin 18 of UCC2897A is Vin + the voltage on C27.

Best Regards,
Ben Lough

0 chentsu chung over 6 years ago in reply to Benjamin Lough

Mastermind 6180 points

Hi Ben,

Got it. And I have to provide 12.7V once I removed the those circuit, am I right?

Best Regards,

C.T.

0 Benjamin Lough over 6 years ago in reply to chentsu chung

TI__Mastermind 27105 points

Hi Chentsu,

After VDD has been charged by the internal JFET to ~12.7V, you will want to keep VDD above the UVLO stop threshold which is 8V typical and 8.4V maximum. As long as VDD is >8.4V the device will continue to run.

Best Regards,
Ben Lough

0 chentsu chung over 6 years ago in reply to Benjamin Lough

Mastermind 6180 points

Hi Ben,

It's very clear, thank you very much.

Best Regards,
C.T.

Power management

Power management forum

UCC2897A: Question about reference design-PMP5123