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TLV62085: 5V convert to 3.3V, PFM, phase, negative

Darren Tong
Prodigy 70 points
Part Number: TLV62085

Hello,

we have observed the phase low level about 0.68V, is it reasonable on PFM operation?

External load=0A

External load=0.22A

External load=0.4A，負壓消除。

  • 0
    TI__Expert 8420 points
    Hi Darren,
    the switch node measurement highly depends on the layout and the measurement setup. the value you observe on the scope may not be the real value the device sees. You could take a look at this app note to understand what influences the SW measurements: www.ti.com/.../slva494a.pdf.

    for DCDC converter the layout design is critical, this should be done properly as recommended by the datasheet.
    Coudl you share the schematic and the layout?
    what is the customer main concern regarding this measurement?
  • 0 in reply to Sabrina
    Prodigy 70 points

    thanks for your comment, Sabina.

    the Schematic and layout is post below

    We have use "low-inductance probe" as app note, it can observed negative base about -640mV as below, increase external load to 0.4A; the negative base recover to zero. is it possible TLV62085 internal MOSFET both off?

    External load=0A

     External load=240mA

    External load=400mA

  • 0 in reply to Darren Tong
    TI__Expert 8420 points
    Hi Darren,
    thanks for posting the schematic, could you confirm if the snubber circuit on the SW pin is populated while doing these measurements?
    Regarding the layout gnd connection of the input capacitor could be improved further.
    Did you try to measure the same on the TLV62085 EVM?

    Thanks
    Sabrina
  • 0 in reply to Sabrina
    Prodigy 70 points

    1. Populated snubber circuit makes TLV62085 into CCM more earlier when extenal load reached 320mA.

    2. We added a 22uF/1206 MLCC cross TLV62085 between input positive to output GND as illustrated as below, it is no improvement.

    3. We have contacted TI Taipei side to test same configuration on EVM.

    4. We have tested another board that by TI's agent FAE, it also observed the same situation that has a negative base level. it seems not single case, do you have idea why negative based voltage emerged from currently circuit?

  • 0 in reply to Darren Tong
    TI__Expert 8420 points
    Hi Darren,
    Sorry for the delayed answered, I had a discussion with our internal team., And I also double checked on our EVM.
    Basically what you measure is expected. In PFM mode the low side switch is not actively driven (gate driver is offf), the current goes through the backgate diode of the low side mosfet during t_pause described in section 7.3.1 of the DS. The -640mV you measure is basically the voltage drop accross the backgate diode.

    The schematic and layout of your design follow the recommendation of the DS, I don't think the snubber circuit is necessary here.

    Regards,
    Sabrina
  • 0 in reply to Sabrina
    Prodigy 70 points

    Thanks for your comment and confirmation, Sabrina. 

    We are figured it out now.