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UCD3138: Calibration between ADC and EADC measurement

Marc Ferrer96
Prodigy 140 points
Part Number: UCD3138

Hi,

I would need to avoid offset between EADC and ADC  modules, assuming that EADC is doing better measurement than ADC.  I am thinking about using  EADCVALUE.bit.ABS_VALUE and comparing it to ADC measurement in order to set an offset to the ADC module. Is it possible to use this register without being in SAR mode? Is there any other possible way to decrease this offset via SW? 

Thanks,

Marc Ferrer

  • 0
    TI__Genius 17090 points

    I'm not sure that the EADC will have a lower offset/slope variation from the ADC.  Don't forget that the EADC DAC is also involved in the EADC absolute value.  Also the input amplifier, which has an offset and a gain variation as well.  I believe that you can use the ABS_VALUE without being in SAR mode.  To make sure that it's a valid value, check to see that the SAT_HIGH and SAT_LOW bits are not set.  I don't know any real way to get a relative calibration unless you measure the same signal on an ADC pin and an EADC pin. 

    The offset value and slope values will vary from chip to chip, within the range of the specification. 

  • 0 in reply to Ian Bower
    Prodigy 140 points
    Hi Ian,

    Thanks for the answer. My interest is on align both measures, so I think using ABS_VALUE is a good way.

    In relation with this, I am also interested in filtering the EADC error without touching PID coefficients. Is it possible to access and filter Xn, Yn or even PWM period via SW in order to slow down dynamic esponse without a variation on PID coefficients?

    Regards,

    Marc Ferrer
  • 0 in reply to Marc Ferrer96
    TI__Genius 17090 points
    That would be really defeating the purpose of the filter, which is designed to give you filtering in 500 nanoseconds. I guess you could do it by running one front end and reading its EADC, and filtering it and putting its result into another filter using the CPU_SAMPLE mode, but it would be much slower.