Other Parts Discussed in Thread: PTD08D210W
Good day!
In the power section of the ZC702 eval board from Xilinx, power section uses UCD9248. The datasheet of the evaluation kit has been attached to this thread.
1) What are the fault B lines for (Refer pages 39, 42 and 45)? The netlabels (eg. PWRCTL_VCC2B_FLT) are connected to other UCD9248s. We understood what the A channel fault lines do (fault detection from PTD08D210W), but couldn't understand B channel's fault line functionality.
2) What is the SEQ IOs for?
Our basic idea is that these are for sequencing. But from UCD's datasheet http://www.ti.com/lit/ds/symlink/ucd9248.pdf (page 26- Sequencing), there are three methods of sequencing. In that case,
a) Does the ZC702 board have the option of sequencing in all three methods?
b) Which sequencing is better? Can we connect only those lines and leave the remaining floating?
3) We found that on page 42, the CS lines are short to AGND2 which is not connected system ground (GND or AGND2_9248). Is this correct? If yes, could you please justify?
4) On page 45, the CS lines are again connected to AGND2 which is again confusing. Is this also correct?
We request you to clarify these doubts as soon as possible.
Thanks and regards,
Nishitha and teamxtp185-zc702-schematic-rev1-1.pdf