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UCC256303: UCC25630-3 Gate Driver LATCH OFF

Color Yen
Intellectual 340 points
Part Number: UCC256303
Other Parts Discussed in Thread: UCC39002

Dear

When I use the IC UCC25630-3, it happens to shut down in the unprotection.

IC'S GATE DRIVER stops working & Latching off.

Why was it happened?

Could you reply my question,please?

THX

  • 0 in reply to Hong Huang
    TI__Guru 73825 points

    Our observation is that the red circled areas show ISNS has multiple zero crossings and likely the issue in your design of LO latch up is due to these ISNS multiple zero crossings.

    These noises need to be attenuated so to eliminate the multiple zero crossings to make the IC operation normally.

    We are still reviewing your design layout and will reply to you after review.

  • 0 in reply to Hong Huang
    Intellectual 340 points

    The waveform was captured on unlatch case.

    You can watch waveform which there are the multiple zero crossings.

    Can you explain why it don't shut down?

    CH1 Isns

    CH2 LOW

    CH3 Cr Voltage

    CH4 HIGH

    CH1 Isns

    CH2 LOW

    CH3 Resonant current

    CH4 HIGH

  • 0 in reply to Color Yen
    TI__Guru 73825 points

    Our analysis and test show if there are no multiple zero crossings, there will be no LO latch-up due to the multiple zero crossing; but if there are multiple zero crossings, it is likely there will be LO latch-up. That means, multiple zero crossings can cause LO latch-up but that is not to say multiple zero crossings must cause LO latch-up right with the present of multiple zero crossings. The multiple zero crossings cause the IC internal race conditions so LO latch-up can happen when external multiple zero crossings happened coincidentally have been winning the race conditions.

    So based on what we know, eliminating multiple zero crossings is the way to eliminate the LO latch-up due to the multiple zero crossings.  

  • 0 in reply to Hong Huang
    TI__Guru 73825 points
    I looked at your schematics and the layout. To understand the noise coupled on to ISNS, I need you provide your power stage, too, both schematics and layout. Then I will need your help to check several loops and ground plane.

    Please open a new thread and ask my support, so I will continue on that thread.

    I will need to close this thread as per what we know the issue root cause should be the ISNS multiple zero crossings and the layout needs to be tuned up, since you already tried more capacitance on ISNS and the issue not resolved. But your original question is answered.
  • 0 in reply to Hong Huang
    Intellectual 340 points

    According to your remark, multiple zero crossings may be able to cause LO latch-up
    but it's not necessary for latch-up.
    If IC's the race conditions causes to latch, there are some bugs in UCC25630.
    In any case, it shouldn't be latch-up except happening protection.
    Therefore it is limited designers to be easy to use.

    I'm sure of my problem, which aren't multiple zero crossings.
    At the same condition,I change the voltage of LL/SS.
    If it's too low ,LLC will be unstable and latched for a short time.

    You can't guarantee that problem must be noise.

    Thanks for your help, my problem can't  be solved if you only want to close this thread.

  • 0 in reply to Color Yen
    TI__Guru 73825 points
    Yes, the race condition causes the LO latch-up and needs to fix this race condition inside the IC.

    If you know what is the root cause, then just fix it. As we only know what can be on our analysis and bench test.

    In any case, this thread does not need to exist any more, since we already answered your question based on what we know, and proposed to you to eliminate the ISNS multiple zero crossings in order to solve the LO latch-up issue. If you want to continue, please follow our proposal and work together. But if you decide your findings and thoughts are ok to fix your problem, you can try to solve it.

    If you see additional issues in your design, or you think you will follow our proposal to fix this LO latch-up issue, please open a new thread.
  • 0 in reply to Hong Huang
    TI__Guru 73825 points
    Simple click rejection does not help anything. Again, our proposal is to eliminate the multiple zero crossings on ISNS. This is our answer to your original question. TI thinks resolved. If you do not think it is resolved, please follow what we proposed to you. If you do not agree to follow we proposed, then we cannot help you. You can try your own solution.
  • 0 in reply to Hong Huang
    Intellectual 340 points
    We had asked for TI FAE who tell us that here can find answer.
    So I try to do it.
    But it can't now.

    The problem can't be solved why I need to open a new thread.
    Because it is the same thing.
  • 0 in reply to Color Yen
    TI__Guru 73825 points
    We suggest to eliminate the multiple zero crossings on ISNS. But you think it is not the root cause. So you can first try what you think to solve the issue. If you cannot, please just follow what proposed by us.

    It is helpful to open a new thread if you want to follow our proposal. The new thread will focus on the layout review to resolve the ISNS noise issue.

    If you think differently, a new thread also starts a discussion what your thought is.

    E2E is to answer the original questions. Any extended question should be on new threads.

    So please open a new thread, either follow our proposal or you want to discuss your thought how to solve the issue
  • 0 in reply to Hong Huang
    TI__Guru 73825 points
    We suggest to eliminate the multiple zero crossings on ISNS. Please let us know if the issue still exists if there are not multiple zero crossings on ISNS.
  • 0 in reply to Hong Huang
    TI__Guru 73825 points

    Here are your orginal questions and TI answered them.

    When I use the IC UCC25630-3, it happens to shut down in the unprotection.

    IC'S GATE DRIVER stops working & Latching off.

    Why was it happened?

    Could you reply my question,please?

    - TI answer: the issue is due to ISNS multiple zero crossings present in your design, eliminate the ISNS multiple zero crossings to solve the LO latch issue.

  • 0 in reply to Hong Huang
    Intellectual 340 points
    You had made a remark that multiple zero crossings was not only root cause that can be resulted it in latch-up.
    Do you remember?
    So there is no answer to my problem.
  • 0 in reply to Color Yen
    TI__Guru 73825 points
    But you replied the input voltage ok, and all others I asked were ok by your replies. The only thing left is the multiple zero crossings - that is the "why". So answered your original questions.
  • 0 in reply to Hong Huang
    TI__Guru 73825 points

    Here are your original questions and TI answered them.

    When I use the IC UCC25630-3, it happens to shut down in the unprotection.

    IC'S GATE DRIVER stops working & Latching off.

    Why was it happened?

    Could you reply my question,please?

    - TI answer: the issue is due to ISNS multiple zero crossings present in your design, eliminate the ISNS multiple zero crossings to solve the LO latch issue.  All other possibilities as possible root causes were asked to you but are excluded by your replies.

  • 0 in reply to Hong Huang
    TI__Guru 73825 points
    You have opened a new thread for this issue. This thread needs to close. "TI thinks resolved" is to close this thread as all further support will be on your new thread on this issue.
  • 0 in reply to Hong Huang
    Intellectual 340 points
    The answer is the same here.
    I want to use it to solve and close new.
  • 0 in reply to Color Yen
    TI__Guru 73825 points
    As you already tried increase capacitance on ISNS and the issue not resolved, the next step is to review your PCB layout including power stage. Please provide you schematics and layout including both UCC256303 and power stage. After our review, we will need your help to check several loops and ground plane.
  • 0 in reply to Hong Huang
    Intellectual 340 points

    I said that it isn't due to ISNS multiple zero crossings.
    Because I try to change the voltage of LL/SS at the same condition, the latch is happened .
    When the voltage of LL/SS is too low , LLC becomes unstable and latch-up for a short time.
    If the voltage is more high, it won't be latched and work well.
    LL/SS PIN only control the point of skip mode.
    Why does it happen this situation?

  • 0 in reply to Color Yen
    TI__Guru 73825 points

    Your question : Why does it happen this situation?
    TI answer: it is because the race conditions did not exist when you making these changes.

    TI explanation:

    ISNS multiple zero crossings may or may not create the race conditions depending on operation conditions. To eliminate LO latch, the ISNS multiple zero crossings need to be eliminated.

    If there are no ISNS multiple zero crossings, while you still see LO latch issue, then the LO latch is due to a different root cause.

    But now, based on your description, your design is always with ISNS multiple zero crossings.

    The logic is:

    If there are no ISNS multiple zero crossings, then no LO latch.
    If there are ISNS multiple zero crossings, LO latch depends on operation conditions:
    - when race conditions exist, LO latch present,
    - when no race conditions, LO latch does not present.

    If you see LO latch happened while no ISNS multiple zero crossings, then this is a new issue. If you see no LO latch while ISNS has multiple zero crossings, that shows, the race conditions do not exist at that particular operation.

    To eliminate LO latch issue, it is needed to eliminate ISNS multiple zero crossings externally, or you can wait until when an internal fixed IC is available.

  • 0 in reply to Hong Huang
    TI__Guru 73825 points

    Your question : Why does it happen this situation?

    TI answer: it is because the race conditions did not exist when you making these changes.

    TI explanation:

    ISNS multiple zero crossings may or may not create the race conditions depending on operation conditions. To eliminate LO latch, the ISNS multiple zero crossings need to be eliminated.

    If there are no ISNS multiple zero crossings, but you still see LO latch issue, then this is a new issue. But now, your design is always with ISNS multiple zero crossings.

    The logic is:

    If there are no ISNS multiple zero crossings, then no LO latch.

    If there are ISNS multiple zero crossings, LO latch depends on operation conditions:

    - when the race conditions exist, LO latch present,

    - when the race conditions do not exist, LO latch does not present.

     If no LO latch while ISNS has multiple zero crossings, that means, the race conditions do not exist at these particular operations.

    Summary:

    To eliminate LO latch issue, it is needed to eliminate ISNS multiple zero crossings externally, or you can wait to use an internal fixed IC when it is available.

    If you see LO latch while no ISNS multiple zero crossings, then it is different. Please let us know. 

  • 0 in reply to Hong Huang
    Intellectual 340 points

    Latch waveform

    Like this you can explain the situation which LOW is off but High is on.

    CH1 LOW

    CH2 RVCC

    CH3 resonant current

    CH4 HIGH 

  • 0 in reply to Color Yen
    TI__Guru 73825 points

    Your previous waveforms always present multiple zero crossings. You need to show LO latch without multiple zero crossings so we can take it as a different issue.

  • 0 in reply to Hong Huang
    TI__Guru 73825 points
    You need to show ISNS waveform along with LO latch, and ISNS has no multiple zero crossings - then we can take it as a new issue. If ISNS shows multiple zero crossings, then it is not a new issue, and we answered your original questions.
  • 0 in reply to Hong Huang
    TI__Expert 8210 points
    Color

    We're sorry to hear that you are having trouble with your UCC256303 design. Please send an email to me at wefaraci@ti.com so we can help identify a way to resolve this issue.

    I am going to close this thread since we will continue support via email.

    Best Regards,
    Eric