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Original question:

UCC28951: ucc28951

UCC28951-Q1: UCC28951-Q1

SB U
Prodigy 80 points
Part Number: UCC28951-Q1
Other Parts Discussed in Thread: UCC28950

We have designied a PSFB converter of 330W with 360V nominal i/p and 13.2V o/p. While testing we are facing many issues.

1. As soon as i start increasing i/p voltage from say 10V , i observe huge inrush in input current and at 250V i am getting desired o/p. But as soon as we go to our designed range, o/p current goes to 14.5V and but my i/p current is so high that it is causing my mosfet's to fail. Since the IC has i/p overcurent protection and o/p overvoltage protection, we were expecting it to actually stop giving pulses.

2. The wires which connect gate driver to mosfets A,B Cand D is getting so heated up that it is melting the wires. Since we are in the stage of prototype we are implimenting gate driver circuit on separate PCB and integrate gate river card to power circuit using wires.

3. The method how we test our converter goes like this. We first give bias voltage to control card and gate driver card and then we gradually give power to the power circuit starting from 0V. Is this method actually correct? We were thinking of designing a flyback converter for gate driver and control card so that it will operate at our power circuit design range.

  • 0
    TI__Mastermind 25570 points
    Hello Suresh

    To answer your questions in reverse order
    3/ Your method is correct - in fact it's the one I would recommend because it allows you to see how the power stage is operating with little danger of damage to it.

    2/ If the wires are melting then there is some catastrophic error. please send me your schematic and I'll review - I'm at colingillmor@ti.com

    1/ The IC can protect against some conditions - for example an over current due to transformer saturation but it cannot protect against every failure mode - for example if both the top and bottom MOSFETs become short circuit.

    I'd advise you to study your gate drive circuits - and send me the schematic.

    Regards
    Colin
  • 0 in reply to Colin Gillmor
    Prodigy 80 points
    Hi Colin ,

    Some queries
    1. The resistor Rlf1 is of 22ohm, i believe it to be for current limiting. Can a higher value of this resistor effect the performance of controller ic? I want to protect ic from external faults like short circuits due to human error
    2. The theoritical calculation of transformer suggests some value of magnetizing inductance. Based on that value we do all calculations. Suppose if we achieveing a lesser value of mag. ind., how will it effect ?
  • 0 in reply to SB U
    TI__Mastermind 25570 points

    Hello Suresh

    Please post the schematic showing Rlf1, I don't want to assume it is somewhere and giv eyou wrong advice.

    If you use a transformer with lower magnetizing inductance you will see some effects

    In Peak Current Mode control the magnetizing current adds to the slope compensation ramp. You may have to reduce the value of RSUM to compensate. Further, as the amount of slope compensation increases the system starts to show some of the behaviours you would expect from Voltage Mode Control - the output inductor starts to show up in the loop response requiring more complex loop compensation. This is a very extreme case and you probably won't see this.

    The increased magnetizing current will increase the dissipation in the primary circuit. This may be compensated by the fact that less magnetizing inductance requires fewer turns (for a given core size) but it's difficult to genearalise.

    The amount of energy available to drive ZVS will be increased - see /cfs-file/__key/communityserver-discussions-components-files/196/4466.ZVS.docx

    In general, I would use the value given by the Excel Calculator for the UCC28950 device.

    Regards

    Colin

  • 0 in reply to Colin Gillmor
    Prodigy 80 points

    Hi Colin

    I am sorry for not attaching the supporting file.  The resistor I am talking about is the R15 connected to pin 23 in the attached image.

  • 0 in reply to SB U
    TI__Mastermind 25570 points
    Hello Suresh

    Thanks for posting the schematic -

    The resistor along with C5 and C6 is used to filter the VDD line from any noise on VBIAS. The resistor and especially the capacitors should be placed as close as possible to the IC. A higher value of resistor could be used but at some point the high frequency changes in VDD current may get large enough to cause significant voltage ripple at VDD and more capacitance would be needed. There will also be a DC voltage drop across the resistor due to the device current which cannot be allowed to become too large.

    Regards
    Colin