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TPS2561-Q1: Leakage between ports in un-powered state

Greg Norombaba
Prodigy 60 points
Part Number: TPS2561-Q1
Other Parts Discussed in Thread: TPS2561

I have an application with one USB Host port and one USB OTG port.  The scenario I have is the OTG port is connected to Host (a PC) .  When I power down my device the PC is still providing 5V to my OTG port.  This PC VBUS 5V shows up on VOUT2 of the TPS2561 on my board, which I fully expected.  But I am also seeing approx. 1.1V at VIN and also VOUT1 of the IC.  I measured the current of leakage through VOUT1 and it is about 3mA!

What is the leakage path through the TPS2561?  Is this expected?  Will the IC get damaged in this use case?

Any suggestions for eliminating the leakage through an unpowered TPS2561?  Series diode?

Is there another TI dual USB power switch that doesn't have this leakage path when unpowered while voltage is present on VOUT2? 

Thank you,

Greg

  • 0
    TI__Expert 8980 points

    Hi, Greg,

    Its' not expected. Below is leakage current data in datasheet.

    I am not clear about your case. Do you mean you connected VOUT2 to the PC VBUS which is 5V and TPS2561 is disabled? Then you see 5V at VOUT2 , 1.1V at Vin and Vout1, correct?  I don't think it make sense.

    Could you please upload or send me your schematic and set up?

    Regards,

    Bob

  • 0 in reply to Bob Ma
    Prodigy 60 points

    Hi Bob,

    Thank you for the reply.  I'm sorry my questions was not clear.  I was incorrect when I mentioned Vin was getting powered, it is not.

    My device is unpowered and Vin of TPS2561 is 0V.  From this unpowered state, when I plug the OTG port (VOUT1) into a PC, I see voltage on the other port VBUS_HOST (VOUT2).

    Here is a scope plot of the behavior of the two VBUS ports.

    If I start with my system in a powered up state and then power down but leave the PC connected to the OTG port, the problem is a little different.  In this case the VBUS_HOST stays near 5V. 

    Only when I disconnect my system from the PC-USB does the voltage drop on VBUS_HOST.

    Thank you for the help,

    Greg

  • 0 in reply to Greg Norombaba
    TI__Expert 8980 points

    Hi, Greg,

    Thanks a lot. Your set up and waveforms are very clear. From waveforms, seems the VBUS_HOST is caused by VBUS_OTG.

    Today I used EVM to do this test, I applied 5V on OUT1 but I didn't find any voltage on OUT2(VIN is floating, EN pin is tied to Vin). And this is what I expected and it makes sense. So I guess there might be a path from OUT1 to OUT2 and this path is out of TPS2561.

    So I suggest you to remove TPS2561 then test again(plug OTG port to PC) to see if there will be voltage on VBUS_HOST.

    Below is waveform FYI. I used the EVM to do the test. Here is the EVM user's guide where you can find schematic.

    Regards,
    Bob

  • 0 in reply to Bob Ma
    Prodigy 60 points

    Hi Bob,

    I appreciate you performing this test.on the EVM.  This clearly shows no leakage on the TP2561 alone. 

    After further debugging I found a separate leakage path through the uController which has connections to both HOST_VBUS and OTG_VBUS.  See below.

     

    I added a network to disconnect the OTG_VBUS when the power is turned off to the ucontroller - see below.  After that, no more leakage.

    Thanks again for your help Bob,  I appreciate your timely response.

    Greg

  • 0 in reply to Greg Norombaba
    TI__Expert 8980 points
    Glad to know that. Feel free to ask if any questions.

    Regards,
    Bob