LP8860-Q1: VDDIO\Enable input

Yoav Nadler

Part Number: LP8860-Q1

Hi,

i'm using the VDDIO\EN input pin with specific delay in my design. i would like to know what is the minimum time the input should by "disabled" in order to be asserted.

tried to search the datasheet for this info, havent found any answer.

Thanks, Yoav.

over 6 years ago

0 Yoav Nadler over 6 years ago

Prodigy 110 points

just want to make sure everybody understatd:
i would like to oerform the following: enabled -> Disabled -> enabled, and would like to know what is the minimum time that the component will still respond.
thanks.

0 Shirley He over 6 years ago in reply to Yoav Nadler

TI__Expert 5475 points

Hi,

Sorry I still cannot understand your question. What is the period that you refer to? Is it possible to provide a diagram to explain?

0 Yoav Nadler over 6 years ago in reply to Shirley He

Prodigy 110 points

Hi, Iwould like to explain again: While the component is operated and enabled i would like to perform: disable and than enable again. I would like to know what is the minimum time to be “disabled” in order to function correctly. Hope it’s understood.. :) Thanks, yoav.

0 Shirley He over 6 years ago in reply to Yoav Nadler

TI__Expert 5475 points

Hi,

I don't think we have this data at hand. I'll need to ask the team member. May I ask why you care about this time?

0 Yoav Nadler over 6 years ago in reply to Shirley He

Prodigy 110 points

Hi,

We perform this disable-enable inorder to clear the fault status.

We wanted to achive minimum time delay, that why i’m askink for the minimum time

0 Shirley He over 6 years ago in reply to Yoav Nadler

TI__Expert 5475 points

Hi,

If you perform the disable-enable to clear the fault status, the device will also be restarted. So you can't toggle VDDIO/EN to clear the fault without affecting the normal operation. Actually, you can write CLEAR_FAULTS bit or toggle NSS pin to clear the fault.