UCD3138: The respone time of ADC comparator

Hello Han
The spec that you have highlighted above is not exactly what you are looking for.

The UCD3138 series has a peripheral called the fault mux. It can be configured by firmware during at start-up so that while the power supply is running, fault signals can terminate switching on any DPWM pin without firmware intervention.

An example of such a fault signal is an analog comparator output.

The firmware can either check periodically if this mechanism has been tripped (by periodically polling a flag), or the tripping of the mechanism can trigger an interrupt, where the firmware can log the fault and report to a master externally, and either latch off the power supply, or attempt to restart after a period of time. The key point is that the time critical action - disabling switching on the DPWM(s) - is executed immediately (within 150ns) without the firmware having to do anything at run time.

The spec you have highlighted above tells us that if an analog comparator has been configured via the fault mux to terminate switching on a DPWM pin (or multiple DPWM pins), if you step the voltage on the comparator input pin from 0 to 2.5V, the DPWM will stop switching within 150ns of the step occurring.

The response time from comparator tripping to triggering the fast interrupt is a different question. Usually this is specified in clock cycles. I'm not 100% sure what this is off the top of my head, I'll have to talk to the team in Dallas.

Can you find out exactly what the customer is doing, and why they are concerned about this? Are they using the fast interrupt (FIQ) to manually terminate switching on a DPWM using an analog comparator to trip the interrupt, or are they using the fault mux like I described above to disable the DPWM(s) automatically after the comparator trips? If they are using the fault mux, then I would guess they are not as concerned about the interrupt latency. I would guess that they are using the fault mux, and if they are not, perhaps we can recommend that they do, as it is a powerful feature.

Kind Regards
Cormac

Hello again Han
The FIQ latency (the time is takes to start executing the FIQ handler after the interrupt trigger is invoked) is variable, it can vary from 6 to 27 clock cycles on the ARM7TDMI-S core that is used in the UCD3138.

The nominal clock rate is 31.25MHz. Thus the latency can vary from 192ns to 864ns.

Kind Regards
Cormac

Hi Cormac,

Thanks, customer would like to know the firmware response time if customer use a a ADC comparator to trigger a interrupt service function for protection.

The MCU have a timer(50us) interrupt service routing.

Does the comparator have the highest priority to execute its interrupt service function when MCU is running timer interrupt service function?

Btw ,please help me to confirm "the response time from comparator tripping to triggering" with Dallas team ,thanks.

 

hello Han
If the customer has configured a comparator to trigger the fast interrupt, then this has higher priority that the ISR triggered every 50us via the timer, assuming that the timer is triggering the standard interrupt, and not the fast interrupt (which it should be).

As I mentioned in the last post, the interrupt latency (the delay from when the comparator trips to when the fast interrupt service routine starts) varies from 192ns to 864ns (so worst case 864ns), what you need is to add the comparator propagation delay to this delay to get the total delay as seen at the device pin.

I don't see the comparator propagation delay specified in the datasheet, so I will check with the team in Dallas is this information is available and get back to you.
Kind Regards
Cormac

hello again Han
The analog comparators have a propagation delay of 50ns under the conditions shown in the data sheet.

Thus the total worst case fast interrupt latency when using an analog comparator to trigger the fast interrupt will be
50ns + 864ns = 914ns

Is this sufficient information for you? If so, I will close this post

Kind Regards
Cormac