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TPS3850: Setting TPS3850 Watchdog window timings

Mohamed Mounir47
Prodigy 70 points
Part Number: TPS3850

Hi,

First I want to confirm my understanding that: Watchdog configures it's window for the first time after reset delay time (trst) according to SET0 and SET1 pin levels, so if I am controlling these pins using DIO pins in mcu I need to guarantee that I set them to the correct level before RESET pin goes high, is that correct?

Second I have a question regarding changing SET0 and SET1 pins, all I need to do is to enable and disable the watchdog.
If my enable configuration is SET0 = 0 and SET1 = 1, do I need to wait 500-μs (tSET) between pin switching if I am only enabling and disabling watchdog? what would be the consequence of changing the two pins immediately?

Thanks.

  • 0
    TI__Mastermind 19580 points
    Hi Mounir,

    There is no pin sequencing requirements on start up or shutdown.
    You still need to wait Tset which is 500us when switching between SET0 and SET1. So from SET0 = 0 and SET1 = 1 to SET0 = 1 and SET1 =0 it will take 500us because the pins cannot be changed at the same time.

    -Marcoo
  • 0 in reply to Marcoo Z
    Prodigy 70 points
    Hi Marcoo,

    Thanks for you fast reply.

    Could you please confirm on my understanding in the first point of the question?

    "There is no pin sequencing requirements on start up or shutdown"--> does this mean as long as RESET pin is low I can change the levels of SET0 and SET1 immediately but after RESET pin goes high I will need to wait Tset between pins switching?

    Thanks,
    Mounir
  • 0 in reply to Marcoo Z
    Prodigy 70 points
    I think this partially solved my issue, the first part of the question is still not clear for me.
    Thanks.
  • 0 in reply to Mohamed Mounir47
    TI__Mastermind 19580 points

    Hi Mohamed,

    The reset being low is separate from power up or shutdown. I refer to power up and shutdown as VCC getting power or turning off. When reset is low, the internal state machine is still powered up and thus it still requires the timings on SET0 and SET1. There is no sequencing requirement on start up but any change to the watchdog window due to SET0 and SET1 will still require the T(WD-setup).

    If there is a WDI shutdown due to SET0 and SET1 then from:
    e2e.ti.com/.../702229

    "When you disable the watchdog, then re-enable, your watchdog window is set for the window before disabling until a reset occurs (that is V_SENSE drops below VIT-). When a reset occurs, the watchdog window will set for the window configuration window at that moment.

    In your example, you have SET0 = SET1 = 1. This sets a window between 800ms and 1.6s. When you SET1 = 0 to disable, then you SET0 = 0 for the new window 22.5ms to 55ms, the watchdog window remains 800ms to 1.6s. When V_SENSE drops below VIT-, then the window changes to 22.5ms to 55ms."

    On power up, when VCC/SENSE go above the threshold, there is still a T(RST) of 200ms which give plenty of time for the WDI window to be changed with SET0 and SET1 because changes only take 500us. WDI inputs are not counted during this time.
     
    -Marcoo