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TPS65217: INT_LDO and BYPASS query

Part Number: TPS65217
Other Parts Discussed in Thread: TPS65218D0

Hello there!

I am performing a failure analisys on TPS65217 and was looking at a external short circuit fault that could occur on the externally fitted  capacitors fitted to pins INT_LDO and BYPASS. These pins are internally connected to the TPS65217 internal Bias block which powers various internal references which are not detailed in the datasheet. The datasheet only says that these pins (INT_LDO and BYPASS) must not be loaded however it does not say(at least I haven't seen it) what is the the effect it that occurs.

 My question is- would a short to GND in any of these pins cause a "lock out" or any other misbehaviour on the part?

Thanks in advance.


Regards

  

 

  • Roberto,

    When the TPS65217 or any PMIC datasheet says that a pin (or pins) is/are used for internal bias voltages, it means that this is an LDO or load-switch that internally creates a voltage and it is routed elsewhere internally to the device. The only reason the pin exists is to attach a capacitor that would be too large to integrate into the chip.

    These internal power supplies are critical to creating reference voltages (band-gap circuits) and powering support circuitry (comparators, charge pumps, current mirrors, etc.) for the DC-DC converters, LDOs, and load switches.

    It is safe to assume that none of the PMIC will operate correctly if INT_LDO or BYPASS are shorted to GND (because the capacitor fails shorted), or if these capacitors fail open. The behavior of the PMIC would be random and I cannot predict at this time what the failure would look like or if it is repeatable.

  • Brian,

    Thanks for the info- 

    Best regards

    Roberto

  • Brian,

    - forgot to ask-

    Would it be safe to assume that an abnormal operation caused by INT_LDO or BYPASS when the capacitor is open or short to gnd, would trip PGOOD or LDO_PGOOD signal? or would it be another way to detect it ?
  • Roberto,

    Yes, in theory the DCDC converters or LDOs would fail in such a way that the voltage is lower than expected and, as a result, PGOOD or LDO_PGOOD would go low. This would allow the processor or MCU to identify the failure.

    However, the failure could also cause the output voltage to be higher than expected. In this case, PGOOD would not go low and there would be no way of knowing a failure occurs because the TPS65217 only monitors that the output voltage is above VPG (power-good threshold).

    The only way to detect this type of failure would be to put a supervisor on the rails that are sensitive to over-voltage conditions (Core, MPU, DDR, etc.) to detect a fault and hold the PMIC in Reset before damage occurs.

    The TPS65218D0, for example, monitors VPG and VOV (over-voltage) on all of the DC-DC converters and would not require external supervisors.