I am designing a low-side CHG denial switch for a BMS. The source side of the MOSFET will be exposed to the outer world. I am currently using a 15V zener diode to the gate with a weak pullup to PACK+ to drive the gate high and have my own circuitry to pull the gate low in order to turn off the MOSFET. The simplified circuit is pictured below.
While Vgs is protected from ESD events to PACK- via the zener diode I am concerned about Vds violations due to ESD when the MOSFET is turned off. I can't seem to find any literature out there regarding this.
Is a Vds violation generally something to be concerned about when regarding ESD events or is Vgs normally the only thing that needs to be protected?
In the example shown, if a -8kV event occurred at PACK- while the FET is off, I would expect to then see a Vds of 8kV. Clearly this would violate the absolute maximum rating in the datasheet. Although it is of a short duration, would damage still occur?
If this is a concern, would a zener across the FET be the solution to this problem?
