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LM5576: LM5576/-Q1 Regualtor Snubber Network Optimization

user5303907
Prodigy 55 points
Part Number: LM5576

A snubber network was recommended in 8.2.2.13 in order to reduce ringing and voltage spike. I measured a +50V max voltage (3-4V overshoot on rising edge) and a -4V undershoot before applying any snubber network. 

I am wondering:

1. is the negative undershoot more concern to the device/external component relialibility? 

2. what is an acceptable negative voltage range while tuning compensation? Complete removal of undershoot will result in a super slow falling edge that impacts the efficiency. 

3. my understanding is the negative voltage will introduce leakage current running through device substrate that introduce reliability issue. Is that correct? 

Thanks,

Shirleen

  • 0
    TI__Expert 6245 points
    Hello Shirleen,

    Negative overshoot is more of a concern in your application since maximum input voltage is well below the maximum allowed on the VIN pin. Most power supply designers are concerned about ringing while the high side is on since it can generate input noise. The negative overshoot can add stress not only to the power MOSFET but also cause substrate current which can affect chip operation.

    Normally, more undershoot is allowed for very short intervals than is allowed as a DC stress. I am emailing tour product team to see if a study has been done on this type of stress.

    Typically, bad behavior by the IC due to undershoot is more of a concern than poor reliability.

    I will let you know when I find out more.

    Regards, Robert
  • 0 in reply to Robert Blattner
    Prodigy 55 points

    Thanks, Robert,

    I am wondering if -3V undershoot is a problem to this device. The best I can do is to reduce the undershoot to around -2V, but with a super slow falling edge. 

  • 0 in reply to user5303907
    TI__Mastermind 40040 points
    Hello Shirleen,

    Please make sure that you are measuring correctly. Correct measurement for the Sw undershoot is implemented by using a short Ground lead and kelvin connect to Vsw pin and PGnd of the IC. Suggest using a spring clip on the barrel of the probe for Gnd. The max voltage the device can withstand is specified at -1.5V. This typically can be more if less than 10ns or so. But again, if you measure at the IC this is likely to be within limits. If trying to remedy issue proves unsuccessful, the issue is likely caused by a non ideal layout. If you are not able to slow down the switch node to acceptable levels to keep undershoot within spec limits [with correct measurement] then you may have to redo the layout paying close attaching to Cin and how it connects to Vin and PGnd of the device. In addition the Diode needs to be position in a way that the loop formed by Cin+ to VSW to Cathode of diode to IS pin (Anode) to PGnd to CIN (-) is kept very tight.

    Hope this helps?

    David.