Hi,
My customer would like to connect RDY and FLT together to save MCU GPIO, so in this case, when FLT is set to 0, can we pull RST low and make FLT goes back to high and the chip goes back to normal? Because Datasheet Figure 46 says 'the inputs are muted for 5 us by internal circuit after DESAT is detected, RDY is also low until the mute time. FLT can be reset, only IF RDY GOES HIGH'. In this case, RDY is pulled low by FLT externally, but in the internal state, RDY will be high after reset. I think they can connect RDY and FLT together, but please help to confirm it. Thanks.
