UCC3895: UCC3895, unsimmetrical pulses in case of CS pin12

Hello Matthäus

This may be the issue described in the App note www.tij.co.jp/.../slua275.pdf

Could you please have a look at this and try the solution suggested there - although I do see your note about using Voltage Mode Control.

If that does not work then please post a message here. Many instabilities are due to noise coupling into the controller and there may be something in the PCB layout or schematic which we need to look at.

Regards
Colin

Dear Colin Gillmor,

 

thank you for your Answer.

We know this description from TI but this is not our

problem at very low signal and small PWM modulation, we work at

higher signal and big PWM modulation. Therfore is it not an issue

of the offset of the ramp signal.

In the test stage we switched to the voltage mode, because we want to

eliminate the current influence at the ramp input pin 3 in the normal operation.

Our interest is the behavior of the current limiting and shut down at the input CS

on pin12. In this case we have the unsymmetrical pulses.

 

We do another tests:

-       We controlled the correctness of the current measurement-> OK

-       We controlled all components and values in refer to the data sheet -> OK

-       We controlled all influences on interferences -> No effect

-       We tested only the board with UCC3895 without power electronics and

power switching effects. -> Always the same behavior

Only the tests with the control board and feeding with a frequency generator

at pin12 we can produce this effects of unsymmetrical pulses.

At all times if we pass the trigger level of 2V and 2.5V at this input.

In this case of over current protection we have a problem in our power

circuits with unsymmetrical pulses.

Sometimes get the magnetics in saturation and the result is the destruction

of the semiconductors .

What can happen or how we can prevent the false pulse?

 

Thank you very much.

 

Best regards

Matthäus Gottenöf

Development

 

Hello Matthaus

I've not been able to look at this issue for the past few days - I hope to do so tomorrow.
One thing we do see from time to time is the controller being upset by interference from noisy signal lines running under the device body - I don't have your layout to hand but if you wished to send it to me at colingillmor@ti.com I'd be happy to look at it. Gerber or native files are preferred to .pdf images.

Regards
Colin

Hello Matthaus

Please let me know if this is still an open issue -

I re-read the posts and one thing that I had missed before was your use of a signal generator to drive the CS pin. There are a couple of potential problems in doing this. The signal generator would need to be synchronised to the UCC3895 controller and the signal should be either a sawtooth or trapezoid so that it mimics the current in the application.

One method to satisfy both of these conditions would be to use an external signal generator (0/VREF) to synchronise the controller to the generator. Then use a RC circuit to simulate a current sense waveform - reset at the end of each cycle by the rising edge of the SYNC signal. The new cycle starts at the falling edge of the SYNC signal.  I don't have exact values for SYNC pulse width - probably 300ns or so and the UCC3895 will only synchronise to an external source which is faster than its free running frequency.

Here is a sketch of what I suggest.