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TPS386000: Timing Specifications

Teik Hooi Teoh
Intellectual 655 points
Part Number: TPS386000

Hi,

I am checking on specifications for the /RESETn output timing.

In my design, the /RESETn pins are ORed together with a 100k pull-up to 3.3V.

CTn = 47nF to GND

From the datasheet, the delay time from the last sense pin input to the /RESETn release (L to H, open drain pull-up) can be calculated by equation 8 on page 27 of the datasheet.

Assuming CTn is fixed, is there any other tolerances included for that equation to estimate the min./max of the delay time?

Regards,

Teoh

  • 0
    TI__Genius 12630 points
    Teoh,

    The capacitor tolerance should definitely be factored in. The next specs to consider are in the EC table 6.5 in the datasheet are V_TH(CT): CTn pin threshold and I_CT: CT pin charge current.

    Follow this equation and insert the worst case value to find the min/max approximation:
    Delay = C * V_TH(CT) / I_CT

    Please let me know if you have any additional questions! Thanks

    -Michael