Other Parts Discussed in Thread: ISO5852S,
Hiii,
I am designing a SIC Mosfet gate driver & gate drive power supply. I have selected ISO5852s as a driver. Below are the power supply specifications
Input voltage = 15VDC ( fully regulated)
switching frequency = 100khz
two isolated output voltages
out1 = +20Vdc , 50mA ---- for top Mosfet
out2 = +20Vdc , 50mA ---- for Bottom Mosfet
One non isolated voltage 5Vdc, 100mA for primary section of ISO5852s.
since my input dc voltage is fully regulated & i decided to go with no feedback from output , which will remove the option of opto-coupler & also gives the required high isolation from primary to secondary.
To suit all the above requirements , i decided to use fly-buck topology & selected LM5161. For transformer i have selected E25/13/7 N87 material from TDK. To reduce the core losses & to avoid core saturation at higher temperatures i decided to limit the Bmax < 200mT. To limit the Bmax i need to limit the Magnetic filed strength to ±20 A/m.
I have selected dmax as 33.33% to get 5V , which is less than 50% duty. selected turns ratio of transformer as Ns/Np = 4
From core datasheet Ae= 52.5 mm^2 , Le= 57.5mm , Al = 1850nH
Np = ( (15-5) * 3.33)/(0.2 * 52.5) = 3.17 , but with 3 turns i am getting only magnetizing inductnace = 16.65uH . to increase this i have selected 6 turns , where i am getting = 66.6uH. Primary peak current = ( 0.1 + 0.2 + 0.2 + (0.5/2) ) = 0.75A.
Magnetic filed strength max at this peak current is = ( 6 * 0.75 )/ 57.5 = 78.26 A/m , which making the transformer to saturate . please check whether the above design calculation is correct or not & also suggest me to limit the H value. Because of the board size limitation i cannot use cores more than E30. Also suggest me if there is any IC from Texas to drive forward topology in open loop .