TPS2546: Timing interval between EN asserts and USB2 communication

Jim CHEN

Expert 4795 points

Part Number: TPS2546

Dear Team,

I would like to know is there any timing spec which is relative to EN pin and USB2 communication.

Once EN pin asserts, when will USB host starts to do the USB2 communication with device?

I think all the steps should be:

Step1: EN pin asserts

Step2: TPS2546 handle BC1.2 protocol to advertise SDP/CDP/DCP

Step3: After BC1.2, USB host starts to communicate with USB device

So do you know the timing between Step1 and Step3?

Thank you.

Regards,

Jim

over 6 years ago

0 Chuck Branch over 6 years ago

TI__Mastermind 32661 points

Jim,

Your sequence is correct, but I do not see this timing in our datasheet. I know we are both USB and BC1.2 compliant, but I will have to do some research and get back to you on the exact timing.

Regards,
Chuck

0 Jim CHEN over 6 years ago in reply to Chuck Branch

TI__Expert 4795 points

Dear Chuck,

Looking forward to your feedback. Thank you.

Jim

0 Chuck Branch over 6 years ago in reply to Jim CHEN

TI__Mastermind 32661 points

Jim,

I am trying to get a meeting with the designer of this chip tomorrow to get the answer. I expect that it will be 10s of uS before the high speed path is enabled. It will simply be the input hysteresis on the EN pin plus the amount of time it takes the USB power switch charge pump to enable the device.

I should have an answer to you on Tuesday.

Regards,
Chuck

0 Jim CHEN over 6 years ago in reply to Chuck Branch

TI__Expert 4795 points

Chuck,

Thanks. Please let me know if any update.

Regards,
Jim

0 Chuck Branch over 6 years ago in reply to Jim CHEN

TI__Mastermind 32661 points

Jim,

Unfortunately the designer who I need to speak to to confirm this timing is out of the office today, so I will not have a definitive update for you until he returns to the office.

Everyone that I have spoken to says that the 10uS to 100uS is the likely answer, but I want to get a definite answer for you.

Regards,
Chuck

0 Chuck Branch over 6 years ago in reply to Chuck Branch

TI__Mastermind 32661 points

Jim,

I spoke to the designer and the way that the part is structured, the DP/DM lines will be connected and valid before the VBUS line is within the compliant range for the downstream device to recognize the host. This will guarantee that the TPS2526 will not impact Host to Device communication.

The exact timing is not within the datasheet, but the compliance has been verified.

Please click the customer thinks resolved button if I have fully answered your question.

Regards,
Chuck

Power management

Power management forum

TPS2546: Timing interval between EN asserts and USB2 communication