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UCC28517: Power Limit at High Line and Low Line

Edward Paul
Prodigy 50 points
Part Number: UCC28517
Other Parts Discussed in Thread: UC3854A, UC2855A

Dear TI support,

I have a power supply design that is using the UCC28517. It is specified to operate at 720W within the AC input voltage range of 90Vrms to 175Vrms and 1440W between 176Vrms and 270Vrms. I started out by designing for the low line voltage range (90Vrms - 175Vrms) setting a power limit of 800W. This worked well.

However when increasing the input AC voltage to high line (176Vrms - 270Vrms) the power limit was approximatley 900W. Recognising this power limit is to do with the programming of the multiplier output I have increased the current error amplier resistance to account for the reduced multiplier output current at high line. After this change I now have a power limit of 1600W at high line at the expense of a sloppy power limit at low line (almost 1000W!).

Is it possible to improve the power limit for the two input voltage ranges with their different power limits?

Regards,

Edward

  • 0
    TI__Guru 51835 points
    The high line (176Vrms - 270Vrms) power limit is too loose (1000W at 176Vrms and 1600W at 270Vrms), right?

    Did you follow the datasheet about multiplier design on page 20 and Table 2? Also, the datasheet mentions a design note, slua196a (can be downloaded from this below link)

    www.ti.com/.../getliterature.tsp

    which provides guidelines to power limiting design. UCC28517 of its PFC portion is similar to UC3854A/B and UC2855A/B. So the design note is good to use for your design.
  • 0 in reply to Hong Huang
    Prodigy 50 points

    Hi Hong,

    Yes I did follow the datasheet and the design note slua196a explains the power limit in slightly more detail. The multiplier output is dependant on the three inputs VFF, IAC and VVAOUT. These three signals set the output current of the multiplier and hence the reference for the current error amplifier. As the AC input voltage increases IAC increases and so will VFF (IAC is set for high line, VFF at low line). Therefore with increased line voltage the multiplier output current decreases (design note slua196a gives an optimal IMOUT/IAC to follow).

    This works great for a design with a single power output across the universal input voltage range because at high line the input current is less and IMOUT will set a lower current reference.

    However my design has two different power levels at the two different voltage ranges. I would like to know if there is a way to get good power limiting from the PFC at both voltage ranges.

    Please let me know if you need a more detailed explanation a can give a more mathematical explanation if that helps.

    Regards,

    Edward

  • 0 in reply to Edward Paul
    TI__Guru 51835 points

    You need to design them separately. If you want to combine them together, I suggest you design and optimize each individually then trial-and-error to see if you can use some parameter values in between.

    Why do you want to combine the two different rated power designs together?