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TPS65094: VR Config for Apollo Lake Platform

Ale2121
Prodigy 50 points
Part Number: TPS65094

Hello,
We developed a motherboard with the Apollo Lake platform and integrated the PMIC TPS650944 into the design, since we integrated PDDR4 RAM memories.
We are in the stage of carrying out the BRICK-UP of the system and for the moment we are not able to perform the boot correctly.
Our Design is based on the Intel CRB (LEAF-HILL) which originally used the IDT as a PMIC solution.
We have modified the BIOS configuration with the FIT program of intel (flash image tool) as it is recommended in the post: e2e.ti.com/.../634110
But we need to make some inquiries about this modification.
Once we select in the parameter "PMIC / VR Configuration" the value I2C VR - TI TPS650941, the registers "I2C VR CONFIG" must be configured, is not it correct?

If it is correct, what values ​​should we enter in it?
When using PDDR4 memories, we know that we must configure the BULK2CTRL register with the value of 0X33 so that the voltage is 1.00V. But we do not know how to configure this option in this section since the manual only explains that it serves to enable the range of addresses to write without any additional information.

I enclose an image of the I2C VR Config parameter:

Thank you
regards

  • 0
    TI__Genius 9380 points
    Thank you for using E2E, I have forwarded your question to our product specialist for this part. You should hear back from him by this afternoon.
  • 0 in reply to Gordon Varney
    TI__Expert 4155 points
    Hello,

    I am working on finding an answer to your question. However, since this is not a TI tool, our knowledge is a little limited. I have looked through Intel's documentation but haven't found anything on how to do this, so I have contacted Intel directly for assistance.

    I will get back to you when I find out more.
  • 0 in reply to Nick Jakse49
    Prodigy 50 points

    Hello Nick,

    Thank you for taking the time to read my question.
    It is correct that the configuration I need is not done on a Texas application but it is the only one used to make the necessary adjustments to brick-up the Apollo-Lake platform with the Texas WCRP.
    If this is your reference, your colleague Kevin LaRosa in the post e2e.ti.com/.../634110 makes a clear explanation of the steps and I think he should be able to help us with these questions.
    At the moment we can not move forward with the ignition since it seems not to recognize the WCRP so the SOC is constantly restarted.

    regards

  • 0 in reply to Ale2121
    TI__Expert 4155 points
    I did talk to Kevin about this, but he wasn't sure how to do this either. I will let you know when I hear back from Intel.
  • 0 in reply to Nick Jakse49
    TI__Expert 4155 points
    So I haven't heard from Intel, but from what we can tell the value of your I2C VR CONFIG register is correct. The 0x5E275E00 means that the range of addresses the SoC can access is from I2C address 5E: register 0x00 to register 0x27. This gives the SoC access to all of the BUCKxCTRL registers as well as the IRQ, IRQ_MASK_PMICSTAT, and OFFONSRC registers.

    If I hear anything else I will let you know.