Dear Team,
Will the ripple range be affected by FSW configuration at light load condition?
If so, please let me know the reason.
Best Regards,
Hirokazu Takahashi
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Dear Team,
Will the ripple range be affected by FSW configuration at light load condition?
If so, please let me know the reason.
Best Regards,
Hirokazu Takahashi
Dear Takahashi-san,
Thank you for your question.
The output voltage ripple in the power-save mode is explained in the last paragraph of section (9.2.2.2.2.1 Output Capacitor) in page 15 of the datasheet.
The output voltage ripple under steady-state condition is explained in section (8.3.5 Frequency Selection (FSW)) in page 11 of the datasheet.
For more information on how to optimize the output filter, please refer to this application note: slva463a
Best regards
Omar
Hello Omar
Thanks for your advice and support.
We found below output voltage phenomenon at light load condition with FSW=Low and High
The condition of Vin, Vout and Load is same for below twice waveform.
The switching frequency at FSW=H is over 2 times slower than one at FSW=L.
And then, ripple range of output at FSW=H is larger than one at FSW=L.
Is this phenomenon is normal working?
Best Regards,
Hirokazu Takahashi